LPC4330FBD144 Unused Pins

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LPC4330FBD144 Unused Pins

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513件の閲覧回数
redough
Contributor II

We designing a PCB with the LPC4330FBD144. In the data sheet we have not found any documentation for the preferred connections of unused pins. Our design will be optimized for low power operation. What is the preferred connections and state for unused pins on the LPC4330FBD144 for low power operation?

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425件の閲覧回数
jeremyzhou
NXP Employee
NXP Employee

Hi Reid Dorrance,

Thank you for your interest in NXP Semiconductor products and for the opportunity to serve you.
Fig 1 shows how to terminate pins that are not used in the application. In many cases,
unused pins should be connected externally or configured correctly by software to
minimize the overall power consumption of the part.
Unused pins with GPIO function should be configured as outputs set to LOW with their
internal pull-up disabled.

pastedImage_1.png

Fig 1

Have a great day,

TIC

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426件の閲覧回数
jeremyzhou
NXP Employee
NXP Employee

Hi Reid Dorrance,

Thank you for your interest in NXP Semiconductor products and for the opportunity to serve you.
Fig 1 shows how to terminate pins that are not used in the application. In many cases,
unused pins should be connected externally or configured correctly by software to
minimize the overall power consumption of the part.
Unused pins with GPIO function should be configured as outputs set to LOW with their
internal pull-up disabled.

pastedImage_1.png

Fig 1

Have a great day,

TIC

-----------------------------------------------------------------------------------------------------------------------
Note: If this post answers your question, please click the Correct Answer button. Thank you!
-----------------------------------------------------------------------------------------------------------------------