LPC185x- Determine cause of core reset

[vivienwong]

Hi,

  I am trying to detect a reset caused by __RESET and I'm reading the user manual for LPC1857 where there are 2 different ways to determine the core reset:

1. Use a flag in internal RAM to determine the cause of a core reset.
a. Check the value of a flag at the start of execution. Possible flag values are:
i. !=0xAA55 FF01 && !=0xAA55 FF02  power on reset (POR)
ii.0xAA55 FF01  external reset signal (RESET)
iii.0xAA55 FF02  RGU generated core reset
b. After checking the flag, write a value of 0xAA55 FF01 to this flag.
c. Before performing an RGU generated core reset write a value of 0xAA55 FF02 to
this flag.

2. Use bits in the event router registers to determine the cause of a core reset.
a. Check the state of the HILO, EDGE registers, and the RESET_E and RESET_ST
bits in the EDGE and STATUS registers
i. HILO==0 & EDGE==0  power on reset
ii. RESET_E==1 && RESET_ST==1  external reset input (RESET)
b. Setup the event router to detect RESET:
i. RESET_L = 0 // detect a low level (this is the bit's reset value)
ii. RESET_E = 1 // detect a falling edge
iii. RESET_CLRST = 1 // clear the previous event

I tried method 2 but I wasn't able to get it working. My code is this way:

                LPC_EVRT->HILO &= ~(1 << 19);  // clear RESET_L to detect low level
                LPC_EVRT->EDGE|= (1 << 19);    // set RESET_E to detect falling edge
                LPC_EVRT->CLR_STAT|= (1 << 19);  // set to clear the previous event

            if (((LPC_EVRT->EDGE & (1 << 19) == 1) && (LPC_EVRT->STATUS & (1 << 19) == 1))   // external reset input
            {
                LPC_EVRT->HILO &= ~(1 << 19);  // clear RESET_L to detect low level
                LPC_EVRT->EDGE|= (1 << 19);    // set RESET_E to detect falling edge
                LPC_EVRT->CLR_STAT|= (1 << 19);  // set to clear the previous event

           }

The LPC_EVRT STATUS bit 19 (RESET_ST) never gets set even when I manually asserted the __RESET button on my hardware.

As for method 1, what is the address of the internal RAM flag that I can use? Any help at all would be very useful.

Thanks

Vivien

[isaacavila]

Hello Vivien,

For the first method, you can use any address from internal RAM to "allocate a flag", basically, what section

14.5.1 Determine the cause of a core reset

describes is the way to change this value depending the reset source. It uses the first "token" (0xAA55FF01) to signal when RESET by external pin is used and the second "token" (0xAA55FF02) to signal when RGU causes the reset event. However, it is not limited to use only these values.

• Suppose that you choose 0x1000_0000 address for your flag. You can read this address the beginning, if this application has any value different than first token: 0xAA55FF01 (RESET) or second token: 0xAA55FF02 (RGU), then, MCU was reset by POR. (Remember that RAM's content is volatile and on POR event, address 0x1000_0000 will have random data).
• After reading this value, you set the value 0xAA55FF01 to address 0x1000_0000. If a RESET event comes, then at the beginning of the application, 0xAA55FF01 will be read, showing that RESET event was caused. On the other hand, before requesting a RGU reset event, you must write 0xAA55FF02 (second token) and, on the beginning of the application, 0xAA55FF02 will be read, showing that this reset event was caused du RGU.

Does it make sense to you?

Regards,

Isaac