LPC11xx SPI/SSP Problem

[lpcware]

Content originally posted in LPCWare by Coralicious on Fri Mar 15 01:37:34 MST 2013
Hi! I'm using lpc1113/301 for a master-slave communication. Now I'm using as a slave, and I know that Master is sending 3 bytes (0x55, 0xff, 0xff) to me. I can receive them only by setting DSS data to 16-bit (LPC_SSP1->CR0 = 0x070f) but I should receive them also by setting DSS data to 8-bit, so I could send my answer to the master at the same time I receive it's second byte.

The problem is, if I do set DSS data to 8-bit, in my buffer I just receive 0x55, 0x55, 0x55 (the first byte the master sends to me).

When I look to my oscilloscope, I can see on MOSI the 3 data bytes, but in my LED, which I programmed with a toggle to see when does the SSP1_IRQHandler starts, I see that it works each 2 frames of data (each time I've recived the 3 bytes for twice).

What can I do to solve this, so receive 1 byte of data and answer 1 byte just after this?

Sorry for my english

[lpcware]

Content originally posted in LPCWare by cyberstudio on Tue Jun 04 23:05:55 MST 2013

Finally got SPI slave mode 3 to work without pulsing SSEL high for each byte with LPC1114/301... So it seems mode 3 works after all.

[lpcware]

Content originally posted in LPCWare by Coralicious on Mon Apr 15 08:33:04 MST 2013

Thanks for the reply.

I'm doing that but something is wrong. With this, I can send 3 ADC from slave to the master, and master receives ok. But now I'm trying to send one more ADC (4 ADCs by now, but at the end of all, I will have to send-receive 6 ADCs) and my master receives the 4 ADCs messed up.

My vTaskPFC from the master is done by a switch case with 3 cases (1 for each ADC) which have a receive_Word (16bits) function. In my receive function I have:

1. Send 0xffff

2. Send address

3. Receive data from slave

4. Receive crc from slave

**************************************

In my ProcessFrame function from slave, I've got 4 Length where I do:

1. return_value = 0x0000

2. return_value = adc valor

3. return_value = crc

4. return_value = 0x0000

So my MISO looks 0, 0, DATA, CRC, and my MOSI looks OP_R/W, address, FF, FF

This works for 3 ADCs, but not for 4.

Here there're my SPI Irqhandler file

Note that my task 'vTaskPFC' from the master is done each 1ms.

Thank you!!!

[lpcware]

Content originally posted in LPCWare by NXP_Paul on Thu Apr 04 10:41:16 MST 2013

If you are using SPI mode 0, then the SSEL must be pulsed high between each data word.  The User's Manual (paragraph 14.7.2.2) states:
"in the case of continuous back-to-back transmissions, the SSEL signal must be pulsed HIGH between each data word transfer. This is because the slave select pin freezes the data in its serial peripheral register and does not allow it to be altered if the CPHA bit is logic zero. Therefore the master device must raise the SSEL pin of the slave device between each data transfer to enable the serial peripheral data write. On completion of the continuous transfer, the SSEL pin is returned to its idle state one SCK period after the last bit has been captured."

Hopefully this helps.