Content originally posted in LPCWare by fjarnjak on Mon Jul 09 00:58:45 MST 2012
Hello all,
I have noticed a strange problem on USART for LPC11U14 MCU (LPCXpresso board).
If I use this loop in main() method to send some string and watch TX using protocol analyzer I get correct string output.
while(1)
{
UARTSend(buff, 4);
sleep_ms(10);
}
If I ***remove*** sleep_ms(10); call I get garbage out....framing errors being reported on the other side, etc. Same if I connect a real device and not a protocol analyzer (logic analyzer).
UART Init code:
void UARTInit(uint32_t baudrate)
{
LPC_SYSCON->SYSAHBCLKCTRL |= (1<<16); /* Enable IOCON block */
LPC_IOCON->PIO0_18 &= ~0x07; /* UART I/O config */
LPC_IOCON->PIO0_18 |= 0x01; /* UART RXD */
LPC_IOCON->PIO0_19 &= ~0x07;
LPC_IOCON->PIO0_19 |= 0x01; /* UART TXD */
/* Enable UART clock */
LPC_SYSCON->SYSAHBCLKCTRL |= (1<<12);
LPC_SYSCON->UARTCLKDIV = 0x1; /* divided by 1 */
LPC_USART->LCR = 0x83; /* 8 bits, no Parity, 1 Stop bit */
regVal = LPC_SYSCON->UARTCLKDIV;
Fdiv = ((SystemCoreClock/regVal)/16)/baudrate ;/*baud rate */
LPC_USART->DLM = Fdiv / 256;
LPC_USART->DLL = Fdiv % 256;
LPC_USART->LCR = 0x03;/* DLAB = 0 */
LPC_USART->FCR = 0x07;/* Enable and reset TX and RX FIFO. */
/* Read to clear the line status. */
regVal = LPC_USART->LSR;
/* Ensure a clean start, no data in either TX or RX FIFO. */
while (( LPC_USART->LSR & (LSR_THRE|LSR_TEMT)) != (LSR_THRE|LSR_TEMT) );
while ( LPC_USART->LSR & LSR_RDR )
{
regVal = LPC_USART->RBR;/* Dump data from RX FIFO */
}
}
Sending function:
void UARTSend(uint8_t *BufferPtr, uint32_t Length)
{
//while ( !(LPC_USART->LSR & LSR_TEMT) );
while ( Length != 0 )
{
while ( !(LPC_USART->LSR & LSR_THRE) );
LPC_USART->THR = *BufferPtr;
BufferPtr++;
Length--;
}
return;
}
This code above seems not to block on while ( !(LPC_USART->LSR & LSR_THRE) ); in subsequent calls to the function when there is no sleep_ms(10); Otherwise, I would not get garbage but I would get data appened one after the other (or strings...).
I also put another while (now commented out) at the beggining to ensure TX FIFO is empty, but same thing happens. So I commented it out.
Also, when I get garbage, my protocol analyzer reports some strange baud rate. With sleep it works fine - selected baud rate is discovered one.
I have tested above at 9600, 38400 and 57600 bps. CPU is @ 48MHZ.
Any suggestions?