void DMA_Init() { NVIC_DisableIRQ(ADCHS_IRQn); /* Initialize GPDMA controller */ Chip_GPDMA_Init(LPC_GPDMA); /* Setting GPDMA interrupt */ NVIC_DisableIRQ(DMA_IRQn); NVIC_SetPriority(DMA_IRQn, ((0x01 << 3) | 0x01)); NVIC_EnableIRQ(DMA_IRQn); /* Get the free channel for DMA transfer */ dmaChannelNum = 7; Chip_GPDMA_Transfer(LPC_GPDMA, dmaChannelNum, &(LPC_ADCHS->FIFO_OUTPUT[0]), (uint32_t) &dataValue+4*DMACOUNT, GPDMA_TRANSFERTYPE_M2M_CONTROLLER_DMA, ((2UL))); DMACOUNT++; /* Waiting for reading ADC value completed */ //while (channelTC == 0) {} /* Disable interrupts, release DMA channel */ Chip_GPDMA_Stop(LPC_GPDMA, dmaChannelNum); NVIC_DisableIRQ(DMA_IRQn); } void DMA_IRQHandler(void) { if (Chip_GPDMA_Interrupt(LPC_GPDMA, dmaChannelNum) == SUCCESS) { uint8_t TDivider2[30] = "Success DMA \r\n";/// Chip_UART_SendBlocking(LPC_USART2, TDivider2, sizeof(TDivider2)); } else { uint8_t TDivider[30] = "Error DMA \r\n";/// Chip_UART_SendBlocking(LPC_USART2, TDivider, sizeof(TDivider)); /* Process error here */ } } |