Programmable Logic Unit (PLU) offers an interesting functionality in the MCU world. It allows the possibility of creating small combinatorial and/or sequential logic networks including state machines.
In this short blog post I present one of the possible errors that you may encounter while integrating the PLU code (generated from the PLU configuration tool figure below) in your overall application code in the MCUXpresso IDE.
The board that I am working on is: LPCxpresso55s69.
Let's take the example of AND function that you would like to implement using the PLU module.
An option is to use the PLU configuration tool.
The generated code from the configuration tool would look like:
PLU->LUT.INP = 0x00000003; /* IN3 (A) */ // PLU IN n°3 is wired to IN n°1 of the LUT n°1 PLU->LUT.INP = 0x00000004; /* IN4 (B) */ // PLU IN n°4 is wired to IN n°2 of the LUT n°1 PLU->LUT.INP = 0x0000003F; /* default */ / PLU->LUT.INP = 0x0000003F; /* default */ PLU->LUT.INP = 0x0000003F; /* default */ PLU->LUT_TRUTH = 0x88888888; /* AND (AND) STD 2 INPUT AND */ PLU->OUTPUT_MUX = 0x00000000; /* LUT0 (AND) -> Y */
If you copy this piece of code and paste it in the main C code, and you build it in the MCUpresso IDE you will get such error:
How to fix it?
Replace every LUT[x].INP[z] by PLU->LUT[x].INP_MUX[z]
If you look into the header file: LPC55S69_cm33_core0.h where the PLU - Register Layout Typedef is defined you will see (Figure below) how the PLU INPUTs are named in the structure definition:
This is one of the errors that you may encounter.
i hope you found it helpful, and let me know what do you think.
I personally still didn't succeed in implementing a complete example using the PLU module. But still working on it cause it is an interesting feature offered by this board.
Any one else working on that? Don't hesitate to share your experience and/or your errors, it is always helpful:smileywink: