ADCCLKSEL function in LPC804

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ADCCLKSEL function in LPC804

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johan_forslof
Contributor II

The LPC804 appears to contain the following two ADC clocks:

1.Figure 6 on page 52 of UM11065 rev 1.3 shows ADCCLKSRC, ADCCLKDIV originating from the FRO or external clock.

2. Figure 45 on page 279 shows the SYSAHBCLKCTRL[24] register interface clock originating from the AHB system clock.

In my testing the AHB system clock appears to be clock the conversion and without the register interface clock gated the ADC does operate (external triggers do not work). Disabling ADCCLKSRC or ADCCLKDIV has no apparent effect and the recommended initialization sequence (22.3.1 at page 279) does not initialize ADCCLKDIV from the off reset value.

What is the function of the second clock (ADCCLKSRC) in the LPC804?

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Omar_Anguiano
NXP TechSupport
NXP TechSupport

Hello Johan Forslöf

The LPC804 ADC has two clock sources, the FRO clock, and an external clock. If you are using the device SDK you can select the clock source with the function CLOCK_Select(). As a parameter, you can put "kADC_Clk_From_Fro" or "kADC_Clk_From_Extclk".

pastedImage_5.png

 

The reason to use an external clock may vary depending on your application, one reason might be precision since the internal clocks can vary its precision with temperature changes.

 

Let me know if this is helpful, if you have more questions do not hesitate to ask me.

Best regards,

Omar

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johan_forslof
Contributor II

Hello Omar and thank you for your swift response!

I can see why an external clock may be useful but I fear that I am still confused. The clocking diagram on page 279 of UM11065 rev.3 shows a completely different clock tree derived from the system clock instead of the FRO or external clock input:

pastedImage_1.png

Why are there two different clock trees and what are they used for? In my tests the ADC operates normally even with ADCLKSEL set to "none".

The reason I ask is that I originally thought clock generated by the ADCCLKSEL multiplexer was the only one used and spent longer than I'd like to admit debugging a race condition where the register interface clock (bit 24 of SYSAHBCLKCTRL above) was sometimes temporarily masked in an interrupt, during which time external triggers do not work.

To avoid future trouble I would therefore like to clear up what the these two clocks are used for.

Regards,

Johan

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Omar_Anguiano
NXP TechSupport
NXP TechSupport

Hello Johan Forslöf

 

I apology the inconvenience this is causing you. Allow me to clarify this.

We can use this image for reference:

pastedImage_6.png

 

The signal that goes to the APB bridge that I highlighted in yellow is the signal that clock gates the ADC with the SYSAHBCLKCTRL register however to a proper function of the ADC we need a clock source to control the conversions.

These two sources can be the FRO or an external oscillator and are selected with ADCCLKSEL register, if no clock is selected then the ADC will not work as expected.

 

Let me know if this is helpful, if you have more questions do not hesitate to ask me.

Best regards,

Omar

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