ADC of LPC824 pulling up voltage divider

[lpcware]

Content originally posted in LPCWare by svensteudte on Sun Oct 18 03:19:21 MST 2015
Hi,

I'm running a cumstom PCB at 2.5V with a LPC824M201JHI33E from which I want to measure the battery (LiPo) voltage with the ADCs. Because the microcontroller runs at 2.5V, the ADC is connected not directly to the VBAT but to a voltage divider having 2x 10k resistors. Vcc is connected to VREFP and VREFN to GND.

But somehow all my readings are higher than expected. So I've measured the voltage directly at the ADC pin and I was astonished. The ADC-reading has been right. But it seems to me, the LPC824 is pulling the ADC up causing a misreading about 0.15V (roughly). Following example: My VBAT is 3.63V. So the ADC actually should have 1.815V (3.63V / 2 due to voltage divider). But the actual ADC reading was 1.94V which was confirmed by my multimeter.

I've checked if the internal resistors were switched off in the IOCON. Pullup and Pulldown have been disabled. Is there something  I'm doing wrong? A code snippet is attached:

#define ADC_BATT_CH11
#define ADC_BATT_PINSWM_FIXED_ADC11
#define REF_MV2500

uint32_t getBatteryMV(void)
{
uint32_t adc = getADC(ADC_BATT_CH);
return (adc * REF_MV) >> 11;// Return battery voltage (voltage divider factor included)
}

uint32_t getADC(uint8_t ad)
{
// Start ADC conversion
Chip_ADC_SetupSequencer(LPC_ADC, ADC_SEQA_IDX, ADC_SEQ_CTRL_CHANSEL(ad) | ADC_SEQ_CTRL_MODE_EOS | ADC_SEQ_CTRL_HWTRIG_POLPOS);
Chip_ADC_EnableSequencer(LPC_ADC, ADC_SEQA_IDX);

uint32_t i = 0;
uint32_t gdat = 0;
while((gdat & (ADC_DR_OVERRUN | ADC_SEQ_GDAT_DATAVALID)) == 0)
{
// Retrieve sampled data
gdat = Chip_ADC_GetDataReg(LPC_ADC, ad);
}

return ADC_DR_RESULT(gdat);
}

void ADC_Init(void) {
// Configure pins
Chip_Clock_EnablePeriphClock(SYSCTL_CLOCK_SWM);
Chip_SWM_EnableFixedPin(ADC_BATT_PIN);
Chip_Clock_DisablePeriphClock(SYSCTL_CLOCK_SWM);

// Enable ADC clock
Chip_ADC_Init(LPC_ADC, 0);

// Start Calibration
Chip_ADC_StartCalibration(LPC_ADC);
while(!Chip_ADC_IsCalibrationDone(LPC_ADC));

// Configure clock
Chip_ADC_SetClockRate(LPC_ADC, 1000); // Clock 1kHz
}

void ADC_DeInit(void) {
Chip_ADC_DeInit(LPC_ADC); // Power down ADC
}

Regards Sven

[joedesbonnet]

I also encountered this problem a few years ago (strong pullup of ADC input to Vdd) and gave up on finding the cause. (I used an opamp which was strong enough to overcome the effect). For some reason the now obvious cause didn't occur to me then. Only by chance yesterday I was reading the LPC845 datasheet and saw a little note reminding users to disable any internal pullup/pulldown via the IOCON register when using the ADC.  Indeed the pullup is enabled by default and needs to be disabled (remember to enable clock to IOCON too before making changes).

I think what threw me was that I had assumed the internal pullup/pull down was part of the digital IO hardware which the datasheet says is disabled if using the ADC.  I just tried this modification to the firmware on my hardware prototype where I experienced the problem and indeed a floating ADC input now goes from hard Vdd to something like 0.7V when the pullup is disabled.

[ianbenton]

Another thing to watch out for is the acquisition time. There is a time constant of 2.5kΩ with the 0.32pF of Cia and the unspecified Cdac. (which is 10pF on a Microchip microcontroller) For the ADC to settle within 1 bit takes EIGHT time constants. (about 200ns) The impedance of your source adds to the 2.5kΩ, so if you are reading a 10kΩ pot (which has a maximum output impedance of 2.5kΩ) the acquisition time is doubled (400ns), but if your source has an output of 100kΩ then it will take 4µs.

The general advice given is to run the ADC at the fastest speed it can go, but if you find that your values are being strangely influenced by the voltage on the adjacent pin you  have an acquisition time problem. My advice would be to run the ADC at the SLOWEST speed which will get the job done in the time available. (Each channel takes 25 clock cycles to read). The only occasion when I wouldn't recommend this is if you are sampling two waveforms and trying to determine the phase difference between them, in which case make sure that they are on adjacent pins so that the ADC reads one immediately after the other.

[lpcware]

Content originally posted in LPCWare by IanB on Tue Nov 17 06:20:27 MST 2015

---

Quote: And yes you can still buy 10% and even 20% resistors: at http://
Farnell[/url> for example]

---

and they would make excellent cathode bias resistors for an EL34.
EL34

In this case, the dissipation will only be 320µW, so a surface mount resistor will do, and a 1% tolerance part is available for less than £1 a thousand. Even if 5% parts were used, two from the same reel would most likely be better matched than that.

But we digress. . .

The distinction between impedance and resistance, and form the diagram the impedance being capacitive, it is unlikely to have any effect on the DC level, so that is probably not the problem.

I would be interested to know the level measured if the battery were disconnected from the top resistor. That would be a big clue to what was causing the error.

[lpcware]

Content originally posted in LPCWare by serge on Tue Nov 17 00:40:40 MST 2015
I am sorry i meant impedance (sorry for my bad english).
And yes you can still buy 10% and even 20% resistors: at Farnell for example

[lpcware]

Content originally posted in LPCWare by IanB on Mon Nov 16 13:56:06 MST 2015
Can you still get 10% resistors? The last time I saw a 10% resistor was in a valve amp.

The data sheet says that the IMPEDANCE is 100kΩ, not the RESISTANCE. It doesn't mention any RESISTANCE to ground. Figure 37 shows the impedance mainly consisting of capacitance.

This suggests that the input will only be loaded if it has a high frequency signal on it. I'm also puzzled why a DC input is being pulled up. Does the lower 10kΩ resistor in the potential divider go directly to ground near the microprocessor, or does it go "round the houses" to get there? Is there a voltage offset on the low end of the resistor?

[lpcware]

Content originally posted in LPCWare by serge on Mon Nov 16 03:14:57 MST 2015
In addition to the above: what is the tolerance of the used resistors? 1%? 5%? 10%? This added to the relatively low input resistance of the ADC converter can produce the result you are noticing.

[lpcware]

Content originally posted in LPCWare by briching on Sun Oct 18 22:00:32 MST 2015
According to the datasheet, the impedance of the A2D can have as low as a 100K-ohm impedance.  If you load your 10K voltage divider with a 100K impedance, you will see as much as a 9.09% error.  Looking at your numbers, it would appear you have roughly a 7% error going on there, which is not surprising at all. 

Buffer that input of the A2D with an op-amp stage and you should be a lot better off.