Serial download mode is not triggered and hang when NAND ECC error is triggered by only enabling secure boot

是

[Background]
[Issue description]
[Impacted devices]
[Workarounds]

[Background]

We will meet boot failure issue in below conditions.

1) Hardware is i.MX6ULL 14x14 EVK. rework for NAND support.

2) Only enable secure boot (CONFIG_SECURE_BOOT) in NAND defconfig. In this condition, the boot data'size in IVT will increase with CSF size(0x4000).

3) Burn the flash without doing the CSF padding, thus the boot data size in IVT is larger than the acutal programming size.

4) Burn the flash with below command will program the primary image and seconday image into the NAND flash.

---

$ kobs-ng init -x -v /run/media/mmcblk0p1/u-boot.imx-nand

---

[Issue description]

In above conditions, we will meet boot faliure when booting from NAND, and the system won't go into serial download mode.

This is because the ROM will read the unprogrammed region based on the wrong boot data's size in the IVT, then it will trigger the ECC error, then the boot ROM will do the warm reset to boot the seconday boot image, but this warm reset is not correctly resetting the DDR controller that will impact the final DDR initialization when the DCD will be run for the second time by the secondary image, then the system will hang due to our DDR controller can't be initialized twice in i.MX6ULL. Please see a similar issue in [1].

[Impacted devices]

We only test the i.MX6ULL in open mode, other devices which is using DCD to intialize DDR may be impacted.

If you meet this issue in other devices, please see the workaround described in [1] and report to us.

[Workarounds]

1) For the boot faliure issue, two workarounds can be used.

(1) Padding the uboot image to align with the boot data's size in IVT.

(2) Manually correct the boot data's size to the actual uboot binary's size.

2) To let device go into serial download mode which should be the expected behaviour. Please check below commit for 6SLL.

----

commit 91f10877146407da5ef6670e406de4e044354c89

Author: Jason Liu <jason.hui.liu@nxp.com>

Date: Thu Jul 11 06:15:19 2019 +0800

imx6sll: redundant boot fix

Need clear the bit17 of CCDR, otherwise, system will hang up when

ROM run the DCD of second image. The reason due to ROM issue the

wdg_warm_reset when the authentication of the first image failed,

but it will also put the DDR into SR mode-the SDCLK to MMDC is off.

So, when ROM run the DCD of the second image, system will hang up.

In order to fix the issue, we simply clear the bit17 of CCDR in DCD

and restore it after u-boot boot up.

Signed-off-by: Jason Liu <jason.hui.liu@nxp.com>

---

Or apply below patch, the system can go into serial download mode.

----

--- a/board/freescale/mx6ullevk/imximage.cfg

+++ b/board/freescale/mx6ullevk/imximage.cfg

@@ -50,7 +50,7 @@ CSF CONFIG_CSF_SIZE

* Address absolute address of the register

* value value to be stored in the register

*/

-

+DATA 4 0x020c4004 0x00000000

/* Enable all clocks */

DATA 4 0x020c4068 0xffffffff

DATA 4 0x020c406c 0xffffffff

diff --git a/board/freescale/mx6ullevk/mx6ullevk.c b/board/freescale/mx6ullevk/mx6ullevk.c

index eeebcb3..9ee0549 100644

--- a/board/freescale/mx6ullevk/mx6ullevk.c

+++ b/board/freescale/mx6ullevk/mx6ullevk.c

@@ -488,7 +488,7 @@ int board_late_init(void)

#ifdef CONFIG_CMD_BMODE

add_board_boot_modes(board_boot_modes);

#endif

-

+ struct mxc_ccm_reg *ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR;

env_set("tee", "no");

#ifdef CONFIG_IMX_OPTEE

env_set("tee", "yes");

@@ -513,6 +513,8 @@ int board_late_init(void)

#endif

set_wdog_reset((struct wdog_regs *)WDOG1_BASE_ADDR);

+ /* restore to the default value */

+ writel(0x00020000, &ccm->ccdr);

return 0;

}

diff --git a/configs/mx6ull_14x14_evk_nand_defconfig b/configs/mx6ull_14x14_evk_nand_defconfig

index 38f2dcf..b501fbc 100644

--- a/configs/mx6ull_14x14_evk_nand_defconfig

+++ b/configs/mx6ull_14x14_evk_nand_defconfig

@@ -47,3 +47,4 @@ CONFIG_DM_ETH=y

CONFIG_PHYLIB=y

CONFIG_PHY_MICREL=y

CONFIG_FEC_MXC=y

+CONFIG_SECURE_BOOT=y

----

Thank you.

[1] [BootROM/HABv4] - Redundant boot support is not triggered when first image's code is tampered

Best Regards,

Frank