Hi Elango M,
Thank you for your testing.
I also test your code today.
Actually, even use this code directly:
void SPI0_ISR (void)
{
(void)SPI0_S;
if ((SPI0_S & SPI_S_SPTEF_MASK)) // Check Tx buffer staus flag@@@ is empty
{
SPI0_D = 0x55;
}
}
I also can find about 1us delay in the SPI bus!


You can find the intervals is about 1us.
Actually, this is normal, let me tell you the details.
As you know, the system clock is just 48Mhz, but your SPI baudrate is 12Mhz.
From the ARM CortexM0+ core document, you can know, the Interrupt Latency is 16cycles.

Then debug the code, you can find the ISR asm code:
Each asm code line also have the clock cycle, about the detail cycle you can refer to ARM core document:

So, just add the whole ISR asm code execution time, also add your callback time:

As I know, it is about 50 cycles core clock, now ,just take 50cycles as an example.
50*(1/48Mhz)=1.04us.
This is the root reason why you have this gap between the SPI bytes, it is caused by the system clock can't too be high, and your SPI baudrate is very high.
So, if you don't want to have the gap, you can minimize the SPI baudrate, or delete the callback, just add the code in SPI0_IRQHandler, but this also have gap, just cut down.
As I know, 1Mhz won't have the gap.
Wish it helps you!
Have a great day,
Kerry
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