KSDK2.0 fsl_rcm.h error in rcm_reset_source_t

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KSDK2.0 fsl_rcm.h error in rcm_reset_source_t

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manfredschnell
Contributor IV

Hello,

 

we use KSDK2.0 with K64.

 

I think file "fsl_rcm.h" contains a typo error.

In "typedef enum _rcm_reset_source" the enumerated type "RCM_SourceSw" is wrong.

 

It is defined with

    kRCM_SourceSw = RCM_SRS1_SW_MASK, /*!< Software reset */

 

and it should be:

    kRCM_SourceSw = RCM_SRS1_SW_MASK << 8, /*!< Software reset */

 

like all the other "RCM_SRS1" bits.

 

Best regards

Manfred

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guylejeune
Contributor III

Hello,

I have a similar situation as Manfred, with a MK22 and KDSK 2.0.

I agree with his conclusion : RCM_SRS1_SW_MASK should be 8-bit shifted.

Looking at fsl_rcm.h, other reset flag of SRS1 are shifted as well in this mode.

I guess this is a small forgetting..

    kRCM_SourceLockup = RCM_SRS1_LOCKUP_MASK << 8U, /*!< Core lock up reset */
    kRCM_SourceSw = RCM_SRS1_SW_MASK, /*!< Software reset */
#if (defined(FSL_FEATURE_RCM_HAS_MDM_AP) && FSL_FEATURE_RCM_HAS_MDM_AP)
    kRCM_SourceMdmap = RCM_SRS1_MDM_AP_MASK << 8U,    /*!< MDM-AP system reset */
#endif /* FSL_FEATURE_RCM_HAS_MDM_AP */
#if (defined(FSL_FEATURE_RCM_HAS_EZPORT) && FSL_FEATURE_RCM_HAS_EZPORT)
    kRCM_SourceEzpt = RCM_SRS1_EZPT_MASK << 8U,       /*!< EzPort reset */
#endif /* FSL_FEATURE_RCM_HAS_EZPORT */
    kRCM_SourceSackerr = RCM_SRS1_SACKERR_MASK << 8U, /*!< Parameter could get all reset flags */‍‍‍‍‍‍‍‍‍
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xiangjun_rong
NXP TechSupport
NXP TechSupport

Hi, Manfred,

I think the definition     kRCM_SourceSw = RCM_SRS1_SW_MASK, /*!< Software reset */ is correct, the RCM_SRS1_SW_MASK is declared as in MK64F12.h:

#define RCM_SRS1_SW_MASK                         (0x4U)

Hope it can help you.

BR

XiangJun Rong

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manfredschnell
Contributor IV

Hi XiangJun Rong,

thank you for your answer.

I think you are wrong.

There are two definitions for "kRCM_SourceSw" and with "MK64F12_features.h" --> FSL_FEATURE_RCM_REG_WIDTH (8) the else (second) definition is used.

--> In file "fsl_rcm.h" below this line: #else /* (FSL_FEATURE_RCM_REG_WIDTH == 32) */

Here it is necessary to shift every "RCM_SRS1_xxxxx" - value to the next byte.

If you don't shift --> "RCM_SRS1_x" values are equal to "RCM_SRS0_x" values.

In case of RCM_SRS1_SW_MASK it would be equal to RCM_SRS0_LOC_MASK....

I hope you get my point of view.

Best regards

Manfred

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xiangjun_rong
NXP TechSupport
NXP TechSupport

Hi, Manfred,

For SRS1 register access, it is dependent on how you access the register of RCM, if you access the RCM register in half-Word(16 bits) mode, you are right, all bits in SRS1 reg should be left-shift by 8 bits. If you accress the RCM register in Byte mode, you do not need bit shift.

This is the RCM structure defined in MK64F12.h

typedef struct {
  __I  uint8_t SRS0;                               /**< System Reset Status Register 0, offset: 0x0 */
  __I  uint8_t SRS1;                               /**< System Reset Status Register 1, offset: 0x1 */
       uint8_t RESERVED_0[2];
  __IO uint8_t RPFC;                               /**< Reset Pin Filter Control register, offset: 0x4 */
  __IO uint8_t RPFW;                               /**< Reset Pin Filter Width register, offset: 0x5 */
       uint8_t RESERVED_1[1];
  __I  uint8_t MR;                                 /**< Mode Register, offset: 0x7 */
} RCM_Type;

This is the code to access RCM reg in fsl_rcm.c

void RCM_ConfigureResetPinFilter(RCM_Type *base, const rcm_reset_pin_filter_config_t *config)
{
#if (defined(FSL_FEATURE_RCM_REG_WIDTH) && (FSL_FEATURE_RCM_REG_WIDTH == 32))
    uint32_t reg;

    reg = (((uint32_t)config->enableFilterInStop << RCM_RPC_RSTFLTSS_SHIFT) | (uint32_t)config->filterInRunWait);
    if (config->filterInRunWait == kRCM_FilterBusClock)
    {
        reg |= ((uint32_t)config->busClockFilterCount << RCM_RPC_RSTFLTSEL_SHIFT);
    }
    base->RPC = reg;
#else
    base->RPFC = ((uint8_t)(config->enableFilterInStop << RCM_RPFC_RSTFLTSS_SHIFT) | (uint8_t)config->filterInRunWait);
    if (config->filterInRunWait == kRCM_FilterBusClock)
    {
        base->RPFW = config->busClockFilterCount;
    }
#endif /* FSL_FEATURE_RCM_REG_WIDTH */
}

so the code to access the RCM reg  is in Byte mode, I think it is unnecessary to do bit shift by 8.

Hope it can help you.

BR

XiangJun Rong

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manfredschnell
Contributor IV

Hi XiangJun Rong,

thank you for your answer.

You are wrong again. --> the source-code in your anwer doesn't use any of my mentioned values "RCM_SRSy_xxx".

I use RCM_GetPreviousResetSources() in "fsl_rcm.h" to determine the last reset source.

Demo source is KSDK_2.0\boards\twrk64f120m\driver_examples\wdog\iar.

out of "fsl_rcm.h" -->

 * Example:
   @code
   uint32_t resetStatus;

   // To get all reset source statuses.
   resetStatus = RCM_GetPreviousResetSources(RCM) & kRCM_SourceAll;

   // To test whether the MCU is reset using Watchdog.
   resetStatus = RCM_GetPreviousResetSources(RCM) & kRCM_SourceWdog;

   // To test multiple reset sources.
   resetStatus = RCM_GetPreviousResetSources(RCM) & (kRCM_SourceWdog | kRCM_SourcePin);
   @endcode
 *
 * @param base RCM peripheral base address.
 * @return All reset source status bit map.
 */
static inline uint32_t RCM_GetPreviousResetSources(RCM_Type *base)
{
#if (defined(FSL_FEATURE_RCM_REG_WIDTH) && (FSL_FEATURE_RCM_REG_WIDTH == 32))
    return base->SRS;
#else
    return (uint32_t)((uint32_t)base->SRS0 | ((uint32_t)base->SRS1 << 8U));
#endif /* (FSL_FEATURE_RCM_REG_WIDTH == 32) */
}

Here is the second (else - case) Definition used.

When I try to get the reason for last reset, the SRS1 - values from "MK64F12.h" need to be shifted in "fsl_rcm.h";

original:

#if (defined(FSL_FEATURE_RCM_HAS_JTAG) && FSL_FEATURE_RCM_HAS_JTAG)
    kRCM_SourceJtag = RCM_SRS1_JTAG_MASK << 8U,     /*!< JTAG generated reset */
#endif /* FSL_FEATURE_RCM_HAS_JTAG */
    kRCM_SourceLockup = RCM_SRS1_LOCKUP_MASK << 8U, /*!< Core lock up reset */
    kRCM_SourceSw = RCM_SRS1_SW_MASK, /*!< Software reset */
#if (defined(FSL_FEATURE_RCM_HAS_MDM_AP) && FSL_FEATURE_RCM_HAS_MDM_AP)
    kRCM_SourceMdmap = RCM_SRS1_MDM_AP_MASK << 8U,    /*!< MDM-AP system reset */
#endif /* FSL_FEATURE_RCM_HAS_MDM_AP */
#if (defined(FSL_FEATURE_RCM_HAS_EZPORT) && FSL_FEATURE_RCM_HAS_EZPORT)
    kRCM_SourceEzpt = RCM_SRS1_EZPT_MASK << 8U,       /*!< EzPort reset */
#endif /* FSL_FEATURE_RCM_HAS_EZPORT */

the corrected line must be:

    kRCM_SourceSw = RCM_SRS1_SW_MASK << 8, /*!< Software reset */

--> just Smiley Happy .. and say that I'm right.

Best regards
Manfred

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xiangjun_rong
NXP TechSupport
NXP TechSupport

Hi, Manfred,

whether you need to shift or not is dependent on the register access mode:word accessing, half-word accessing or byte accessing, you use word accessing with the line:

 return (uint32_t)((uint32_t)base->SRS0 | ((uint32_t)base->SRS1 << 8U));
the left shifting is required.
But the default RCM type structure is byte accessing.
typedef struct {
  __I  uint8_t SRS0;                               /**< System Reset Status Register 0, offset: 0x0 */
  __I  uint8_t SRS1;                               /**< System Reset Status Register 1, offset: 0x1 */
       uint8_t RESERVED_0[2];
  __IO uint8_t RPFC;                               /**< Reset Pin Filter Control register, offset: 0x4 */
  __IO uint8_t RPFW;                               /**< Reset Pin Filter Width register, offset: 0x5 */
       uint8_t RESERVED_1[1];
  __I  uint8_t MR;                                 /**< Mode Register, offset: 0x7 */
} RCM_Type;
BR
XiangJun Rong
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manfredschnell
Contributor IV

Hi XiangJun Rong,

thank you for your answer. I suspect, you didn't get my point.

This is my last try. I wrote a small demo for you.

#include "fsl_rcm.h"
    
volatile uint32_t test_RCM;
volatile uint32_t dummyCnt = 0;

    // simulate the fucntion RCM_GetPreviousResetSources()
    // test_RCM = RCM_GetPreviousResetSources();
    // with reg SRS0  LVD       bit set
    // and reg SRS1   SourceSw  bit set 
    
    // I would expect  kRCM_SourceLvd and kRCM_SourceSw in test_RCM
    test_RCM = (uint32_t)((uint32_t)RCM_SRS0_LVD_MASK | ((uint32_t)RCM_SRS1_SW_MASK << 8U));

    // Test for kRCM_SourceLvd
    if ( test_RCM & kRCM_SourceLvd ) {
      // the Header fsl_rcm.h is right
      dummyCnt++;
    }
    else {
      // the Header fsl_rcm.h is wrong
      dummyCnt--;
    }

    // Test for kRCM_SourceSw
    if ( test_RCM & kRCM_SourceSw ) {
      // the Header fsl_rcm.h is right
      dummyCnt++;
    }
    else {
      // the Header fsl_rcm.h is wrong
      // the definition of kRCM_SourceSw has to be changed
      // --> kRCM_SourceSw = RCM_SRS1_SW_MASK << 8,  
      dummyCnt--;
    }

‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍

Take it or leave it. For me, this item is closed.

Best regards

Manfred

EDIT:

******

pls look at: "Kinetis SDK Release Notes MK64F12_v2.1.0.pdf"

RCM

The current RCM driver version is 2.0.1

• 2.0.0

• Initial version

• 2.0.1

• [KPSDK-10249] Fixed the kRCM_SourceSw bit shift issue.

EDIT:

******

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