Example PEx project that hows how to transition between HSRUN, RUN, and VLPR modes.

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Example PEx project that hows how to transition between HSRUN, RUN, and VLPR modes.

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marks
Contributor IV

Hello, I'm using KDS v3.2.0 and SDK 1.3.0. Targeting a K22. I'm trying to go between HSRUN, RUN and VLPR modes using the fsl_clock_manager PEx component. I have also tried using the fsl_power_manager to set the power to the appropriate state before changing the clock but have not had any success.

 

Is there an example available, or could someone please cook one up, that shows how to transition between these states using the above components? Thanks in advance for your help!

 

Mark

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marks
Contributor IV

Hi Alice,

Thank you, that is helpful!

For those reading this and about to break out their FRDM-K22F board it is helpful to know that the console uart signals come out on J2-18 (UART1_TX) and J2-20 (UART1_RX). Set Baud to **9600**.

Rande, Regarding the clockConfigNumber missing. I did find a config box labeled "Configuration structures generation".

pastedImage_0.png

Without that being checked nothing is generated as far as the various clock configs as best I can tell.

Best regards,

Mark

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randenewberry
Contributor IV

Thanks Mark, the config number is correct now. next problem is how to get in the BLPI mode. When I select this and build code, the generated code is using the .mcg_mode = kMcgModePEE, /*!< PEE mode */

Odd thing is this mode is not even available on the MK02 processor I'm using..

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randenewberry
Contributor IV

Hi Mark,

I am having the exact problem. I do not think PE fully supports the fsl_clock_manager. One problem seems to be with the clockConfigNunber it is not the same as the number of configurations set up in PE.

If anyone has been successful using PE to set up more than 1 clock configuration please advise how to,

Thank you,

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928件の閲覧回数
marks
Contributor IV

Hi Alice,

Thank you, that is helpful!

For those reading this and about to break out their FRDM-K22F board it is helpful to know that the console uart signals come out on J2-18 (UART1_TX) and J2-20 (UART1_RX). Set Baud to **9600**.

Rande, Regarding the clockConfigNumber missing. I did find a config box labeled "Configuration structures generation".

pastedImage_0.png

Without that being checked nothing is generated as far as the various clock configs as best I can tell.

Best regards,

Mark

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Alice_Yang
NXP TechSupport
NXP TechSupport

Hello Mark,

Under the KSDK1.3,  there is a power manager demo ,

even though it without PE, while the function is the same, i think you can refer to.

KSDK_1.3.0\examples\frdmk22f\demo_apps\power_manager_hal_demo\kds

Hope it helps

Alice

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