PDB Timing - How to change Time between SVPWM Firing and PDB ADC Conversion without Changing Deadtime?

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PDB Timing - How to change Time between SVPWM Firing and PDB ADC Conversion without Changing Deadtime?

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derekcook
Senior Contributor I

Hello, 

I am wanting to change the time from when the PWM fires to when the PDB gets the phase current ADC conversions. It looks like this time is Tdeadtime/2. 

pastedImage_1.png

tdeadtime/2 seems too short of a time for my system. How do I increase the time between PWM firing and ADC conversion without changing the deadtime? Do I change the PDB counter? How do I change the PDB delay?

Is this related to the following delays in ADCS_init() for PDB?

/* Set amount of delay for the B Samples */
/* DLY0 = (0.4us / PWM_TS) * PDB0_MOD, DLY1 = (2.7us / PWM_TS) * PDB0_MOD */
KMS_PDB->CH[0].DLY[0] = 0;
KMS_PDB->CH[0].DLY[1] = 45;
KMS_PDB->CH[1].DLY[0] = 0;
KMS_PDB->CH[1].DLY[1] = 45;

These delays look hardcoded. Do I need to change this since my PWM freq is 4kHz and my deadtime is 3us? Is this the delay between PWM firing and ADC conversion? In the calculations which resulted in 0 and 4 - What were the PWM_Ts and PDB0_Mod? Also where did the 0.4us and 2.7us come from?

Thanks for the help!

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linestream-adam
Senior Contributor I

I'm confused as to why you want to change these delays. Those delays are hardcoded based on the ADC conversion time. They are not related to the deadtime in any way. The only reason you would need to change those delays is if you are getting ringing in the phase current due to the switch not being settled. But if that were happening, you would see a lot more issues.

Additionally, the timing diagram for KMS does not match the figure you put in your post. KMS samples the ADCs on every PWM reload. It looks like that diagram describes how to setup the PDB in order to sample on every other PWM reload. 

I will admit, it is entirely possible the comment isn't as accurate as it should be.

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derekcook
Senior Contributor I

Hey Adam, 

I was wondering why the delays are hardcoded if they were related to deadtime - that's good to know. Are they in clock cycles? What is the frequency of the PDB clock? Is it 30MHz as well like the ADC clock?

I am a little worried our phase current is not settling out and we are sampling it too early. That is why I was wanting to test changing these delays to see if this helps. In the document where I read that it was related to tdeadtime/2 is where I got that timing diagram as well - that was NXP AN5237. 

The timing diagram was found in NXP AN5237. I did not realize it, but that diagram does look like it is sampling every other reload. The timing looks like it's actually more like the diagram in DRM148 where the ADCs are sampled on every PWM reload:

pastedImage_1.png

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linestream-adam
Senior Contributor I

The PDB clock is 30MHz. I think the 2.7us comment is leading you astray. You can calculate the actual conversion time from the datasheet.

What is the inductance of your motor? It is possible that you are switching too slowly.

The way you test to see what the phase current sampling looks like is by connecting an oscilloscope to the ADC input to the MCU. This will let you see what the signal looks like and you can evaluate what the root cause is.

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derekcook
Senior Contributor I

Hey Adam, 

The inductance of the motor is 1.68mH We are switching at 4kHz. 

I think connecting a scope up to the ADC input may be the next step here. That way I can determine if we are waiting long enough to sample after the PWM has fired.

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derekcook
Senior Contributor I

Hey Adam, 

I found that the problem is also in the ADC input. After investigation it looks like we may have a layout issue. Thanks for the help, and I'll let you know if I run into anything else!

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derekcook
Senior Contributor I

Actually, if the 45 is in clock cycles and relates to 2.7us. Then the PDB would have a frequency of 16.67 MHz?

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