Hi,
I am trying to execute the SDK example frdmk64f_ftm_combine_pwm with Ch 6 and 7 by making the below changes
/*******************************************************************************
* Definitions
******************************************************************************/
/* The Flextimer instance/channel pair used for board */
#define BOARD_FTM_BASEADDR FTM0
/* FTM channel pair 0 works with FTM channels 0 and 1 */
#define BOARD_FTM_CHANNEL_PAIR kFTM_Chnl_6
/* Interrupt number and interrupt handler for the FTM instance used */
#define FTM_INTERRUPT_NUMBER FTM0_IRQn
#define FTM_LED_HANDLER FTM0_IRQHandler
/* Interrupt to enable and flag to read; depends on the FTM channel used */
#define FTM_CHANNEL_INTERRUPT_ENABLE kFTM_Chnl6InterruptEnable
#define FTM_CHANNEL_FLAG kFTM_Chnl6Flag
#define PIN1_IDX 1u /*!< Pin number for pin 1 in a port */
#define PIN2_IDX 2u /*!< Pin number for pin 2 in a port */
#define PIN16_IDX 16u /*!< Pin number for pin 16 in a port */
#define PIN17_IDX 17u /*!< Pin number for pin 17 in a port */
#define PINA1_IDX 1u /*!< Pin number for pin 1 in A port */
#define PINA2_IDX 2u /*!< Pin number for pin 2 in A port */
#define SOPT5_UART0TXSRC_UART_TX 0x00u /*!< UART 0 transmit data source select: UART0_TX pin */
void BOARD_InitPins(void) {
CLOCK_EnableClock(kCLOCK_PortA); /* Port A Clock Gate Control: Clock enabled */
CLOCK_EnableClock(kCLOCK_PortB); /* Port B Clock Gate Control: Clock enabled */
CLOCK_EnableClock(kCLOCK_PortC); /* Port C Clock Gate Control: Clock enabled */
PORT_SetPinMux(PORTB, PIN16_IDX, kPORT_MuxAlt3); /* PORTB16 (pin 62) is configured as UART0_RX */
PORT_SetPinMux(PORTB, PIN17_IDX, kPORT_MuxAlt3); /* PORTB17 (pin 63) is configured as UART0_TX */
//PORT_SetPinMux(PORTC, PIN1_IDX, kPORT_MuxAlt4); /* PORTC1 (pin 71) is configured as FTM0_CH0 */
//PORT_SetPinMux(PORTC, PIN2_IDX, kPORT_MuxAlt4); /* PORTC2 (pin 72) is configured as FTM0_CH1 */
/* PORTA1 (pin 35) is configured as FTM0_CH6 */
PORT_SetPinMux(PORTA, PINA1_IDX, kPORT_MuxAlt3);
/* PORTA2 (pin 36) is configured as FTM0_CH7 */
PORT_SetPinMux(PORTA, PINA2_IDX, kPORT_MuxAlt3);
SIM->SOPT5 = ((SIM->SOPT5 &
(~(SIM_SOPT5_UART0TXSRC_MASK))) /* Mask bits to zero which are setting */
| SIM_SOPT5_UART0TXSRC(SOPT5_UART0TXSRC_UART_TX) /* UART 0 transmit data source select: UART0_TX pin */
);
}
But I cannot see any output, is there any other setting that needs to be changed other than the ones I have shown above?
Regards,
Rashmitha
Could you please tell me if your FTM_SetupPwm function it’s setting the PWM successfully after configure FTM params?
Also you could try changing the to the second pins of channel 6 and 7 (PTD6 and PTD7).
B.R.
VaneB
Hi @VaneB ,
I can see that the registers are updated with values but still cant see output on either PTA1/2 or PTD 6/7
I made below changes in pin_mux.c file to use alternate pins that you mentioned. But its difficult to use these pins as they don't have proper male connectors on the FDRM dev board.
CLOCK_EnableClock(kCLOCK_PortD);
PORT_SetPinMux(PORTD, 6u, kPORT_MuxAlt4);
PORT_SetPinMux(PORTD, 7u, kPORT_MuxAlt4);
Regards,
Rashmitha
Due to the fact that PTA 1 and 2 are connected to the JTAG (it can be seen in the attached images) there may be an interference from the K20 when debugging. Therefore to prevent this you can try powering the board from the USB port. If this does not work, provide me your code to check if there is any problem.
MK64
MK20
B.R.
VaneB
Your code seems to be fine. The only detail I saw was that you don’t seem to be using the latest version of SDK for the MK64. I highly encourage you to use the later software.
On the other hand, as mentioned earlier, the issue might rely on the hardware instead of the code. Have you tried to connect the K64 to the USB port?
B.R.
VaneB