What register should we access to control FlexNVM on FTFE

[Hiroki]

Hi,

FMC has 2 control registers for P-Flash bank 0 - 4 (FMC_PFB01CR and FMC_PFB23CR).

However, there is no description of the register for controlling D-Flash (FlexNVM) bank 0 and 1.

What register affects FlexNVM protection and performance enhance configurations?

Best Regards,

Hiroki

[Hui_Ma]

Hi,

The FlexNVM flash protection setting is located at FTFL_FEPROT and FTFL_FDPROT registers, which will be loaded value to those register from Flash configuration field during chip reset.

FTFL_FEPROT will be loaded from flash address 0x40e;

FTFL_FDPROT will be loaded from flash address 0x40f.

FMC provides three separate mechanisms for accelerating the interface between the device and the flash memory, whatever the code read data from PFLASH or DFLASH.

Wish it help.

best regards,
Ma Hui

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[Hiroki]

Hi

FMC_PFB23CR controls the cache, single entry buffer and prefetch buffer enable for P-Flash 2-3 block.

I'd like to know which equivalent register can control these cache, single entry buffer and prefetch buffer enable for D-Flash?

Best Regards,

Hiroki

[Hui_Ma]

Hi Hiroki,

FMC module as an interface module can access both P Flash and FlexNVM. The FMC_PFB01CR and FMC_PFB23CR also works for FlexNVM memory.

Please check below picture for more detailed info:

Wish it helps.
best regards
Ma Hui

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[Hiroki]

Hi Ma Hui,

Would you say user can control the cache and prefetch buffer for D-Flash bank 0-1 by FMC_PFB23CR?

BR,

Hiroki

[Hui_Ma]

Hi Hiroki,

Yes, customer can use FMC_PFB23CR to control cache and prefetch buffer for D-Flash.

Wish it helps.

best regards
Ma Hui

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Note: If this post answers your question, please click the Correct Answer button. Thank you!
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