The PIT:init_PIT component does not allow "Clock Gate" to be enabled

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The PIT:init_PIT component does not allow "Clock Gate" to be enabled

379 次查看
randenewberry
Contributor IV

Using PE with SDK1.3 with MKL17Z64VLH4 on custom board.

This is the components warning:

pastedImage_1.png

Enabling the clock gate like the description says does not work, it remains disabled.

In fact every disabled item is this component can not be changed.

The Clock manager is using defaults, and this is the first component I tried to use.

Any help would be greatly appreciated.

Thanks,

Rande

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311 次查看
Alice_Yang
NXP TechSupport
NXP TechSupport

Hello Rande,

You just need click the place of "Disabled" , then choose "Enabled" :

pastedImage_1.png

Hope it helps


Have a great day,
TIC

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