Some help understanding clock system.

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Some help understanding clock system.

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patricio
Contributor IV

Hello,

I would appreciate if somebody could help me understanding the clock system. 

In the past I allready worked with a FRDM-KL25Z board and I was quite with it and the Code Warrior.

Now, I am developing a new project and I have to choose a new microcontroler as the KL25Z is not as fast as I need. 

The point is that I need to create a 120MHz square signal from an GIO pin, and I wonder if I could use a FRDM-KV31 board that can run up to a frequency of 120MHz

This is clock diagram of the KV31:

pastedImage_1.png

My intention is to make use of the Flex Timer Module (FTM) to do so, and it says:

pastedImage_3.png

So I understand that Core/System clock is 120MHz so I believe that I would be able to create a 120MHz square signal. Am I right? 

Another related question:

If I read the content of a GPIO port to RAM, how fast can I do it? I mean, which is the clock source? core clock, system clock, bus clock, etc?

Thank you in advance. 

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patricio
Contributor IV

Thank you both for your reply,

Regarding the 120MHz waveform to be created, I am quite embarrassed for committing such a silly mistake. 

Thanks to your comments, I have been analyzing other options, and I think that I might use de KV58 family, as it works at 240MHz. 

The FTM is sourced by 'Fast Peripheral Clock', that could work up to 120MHz. 

Moreover, the GPIO pin could toggle at a very fast slew rate of 0.7ns when it is suplied at 3V.

Any comment will be appreciated. 

Regards. 

Aitor.

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chris_brown
NXP Employee
NXP Employee

Hi patricio‌,

No, I think you have some misunderstandings about the documentation and what is possible.  

Firstly, chapter 38 (which is where your excerpt is from) is specific to the FTM and those clocks it refers to are local FTM clocks.  To find out which chip level system clock sources the FTM, you need to check chapter 5 (table 5-7 to be more specific). From this table you'll see that the FTM is sourced by the Bus clock (which is 60MHz or less).  

Secondly, you have to also remember that if the FTM is sourced by a 60 MHz clock, you won't be able to create a 60 MHz waveform.  The most you would be able to make is 30 MHz and that is pushing the limits of the module.  

Thirdly, you have to also remember that there is a limit to how fast the pins can transition.   This may also limit the frequency of an input or output waveform.  

I don't know of any Kinetis device that produce a waveform that fast, so you may need to look at some higher end devices like a i.MX device or maybe there is an external generator out there for your application?

Regards,

Chris 

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mjbcswitzerland
Specialist V

Hi Aitor

I believe that the maximum FTM output will be half the system clock due to the fact that it can toggle the output on each match. This means that if there is a match each system clock it will generate a square wave at half the system clock rate.

The KV30 has a CLOCKOUT pin but the best that it can do is IRC48MHz since it can't select the system clock - otherwise that would have been the best method of generating the fastest output.

When reading from GPIO and saving to SRAM the maximum speed will also depend on the method used. When the processor does this with instructions (read the GPIO to an internal register and save the internal register to SRAM there will be a number if instructions involved which will presumably be slower that the peripheral clocks involved.
DMA from GPIO to SRAM may be the fastest method (avoiding the CPU) but there will be some bus contentions when other DMA channels are also in operation - to be sure I think that you need to test in representative conditions to see whether you can achieve the throughput or reaction that you need in the particular case.

Regards

Mark

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