Pin assignment (or mapping) procedure

[aes_mike]

What is the proper technique or design procedure for mapping I/O pins on a Kinetis part?  I am new to Kinetis family.

I went through (briefly) the Processor Expert (within Code Warrior) and I see how to assign pins, but it is not clear to me which embedded components you should lay down first, second and so on in order to get maximum/optimal pinout arrangement.  I can see in the Processor window, that if you put your mouse say over the "ADC0" component it highlights all the pins that can be assigned.

I am looking for a big picture approach to specifying pin assignments.  I know what pins I need from a PCB schematic level and was hoping to quickly define them so we can get on with schematic capture.

Is there a prioritization scheme for specifying pin assignments so that you can get the optimal functionality you are looking for in a design?

For example, if I specify an ADC pin for a MKL14Z64 within the Processor Expert there seems to be a lot of pins to chose from, but it is not clear which pins will become conflicts later as you add to the design.  How to resolve or methodically deal with these conflicts?

Thank you for your help.

[JimDon]

The data sheet shows the pin outs.

I wold not use Processor Expert for this purpose. The data sheet has a chart (8.1 KL14 Signal Multiplexing and Pin Assignments) that clearly shows all the multiplexing for the pins. Also, I am not sure how there could be guidelines, as it depends on  what your requirements are.

KL14P80M48SF0.pdf

[aes_mike]

Jim,

Thanks.  Yes, I have looked at those charts, several in fact.  

Maybe a better term for what I am looking for is a pin allocation algorithm.

There are other manufactures that have a suggested pin out allocation scheme that goes something like the algorithm below. 

0. Make a list of the pins require (i.e. ADC inputs, digital I/Os, etc.).  I usually end up with two lists, an absolute must have and a wish list.

1. Allocate those pins that only have one available location

2. then assign the ones that have two, then three and so on.

3. You may have to iterate once or twice depending on fulfillment of your needs/wish lists (i.e. always tradeoffs, especially pin multiplexing since it is a highly constrained resource).

To do this you need a combination of the datasheet table (as Jim mentioned) and a list of signals  (i.e.  UART1_TX ) and their frequency of occurrence within the pin list to assist in the algorithm above.   Some pins are exchangeable in the process so some consideration must be done with respect to that too.

Does Freescale have a pin list signal frequency list for their parts?

I am wondering if perhaps Freescale has automated this somehow within their tools?   If not, they ought too because then one can further assess a part for feasibility within a design that much faster and get it into PCB layout that much faster; the Processor Expert probably already has all the internal logic to do it.

Mike

[erikmalund]

Good question - no real/easyanswer.

what I (would) do is to go ahead and just happily assign pins waiting with GPIO till the end. If when assigning pins to one of the sat devices all possible pinnings give a conflict, go back and change the pinning of some of the earlier defined device..