MKE02Z64: what is the default BUSCLK?

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MKE02Z64: what is the default BUSCLK?

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astrogreco
Contributor II

Goodmornig.

I need to use the FMC (FLASH Memory Controller) module to write the flash and the eeprom.
The first thing required is the FCLKDIV clock divider which must be set correctly based on table 18-2.
The choice depends on the BUSCLK clock.
1) What is the default BUSCLK value?

Going deeper we see that if we are in the FEI mode (FLL engaged internal) that is the default mode and the internal reference clock should be set to 32KHz thanks also to the factory settings of the SCTRIM and SCFTRIM registers, which I do not need to change.

At this point the clock enters the FLL but it is not clear what the output value should be, it says that is in the range 32MHz-40MHz (ICSFLLCLK).
BUSDIV = 0; and BDIV = 0x1 (so the clock is divided by two).
So the output bus clock should be between 16MHz and 20 MHz.

2) What is the correct value? Between 16MHz and 20 MHz the value of FCLKDIV changes.

3) What could be the problem with an incorrect FCLKDIV? is the data retention guaranteed anyway?

Thank you.

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2 Replies

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mjbcswitzerland
Specialist V

Hi

1) The default operation is from the FLL referenced to the 32kHz IRC, with a multiplication factor of 1024. Since BDIV is /2 this means that the core clock speed is about 16MHz, which is (by default) the same as the bus/flash clock.
When using a faster clock speed the BUSDIV must always first be set to ensure the bus/flash speed doesn't exceed the specification.

2) If you use the default 32kHz (trimmed) IRC as reference (and don't use an external crystal/oscillator) this value will be fixed.
For 16MHz bus /flash clock the value for FTMRH_FCLKDIV is 0x0f.

3) If the programming clock is not accurate it can result in loss of data (under-programming) or destruction of the flash (over-programming) so its value should always be set correctly.

Note that the uTasker project (open source or professional) includes full support for KE02 Flash and EEPROM, simulation of the chip and ensurance that no clocks are out of specification. See links below.
Integrated EEPROM solution: http://www.utasker.com/kinetis/KE_EEPROM.html

http://www.utasker.com/kinetis/FRDM-KE02Z.html
http://www.utasker.com/kinetis/FRDM-KE02Z40M.html

KE04Z40 simulation showing operation at 32MHz core and 16MHz bus/flash (derived from 32kHz IRC FLL):

pastedImage_1.png


It works with KDS, MCUXpresso, CW, IAR, Keil, Greenhills, S32 design studio, CooCox, Rowley, Atollic, GCC make file and Visual Studio to give a complete and proven KE02 solution for professionals who need to slash development times and cost, or for hobby/students who can benefit from its chip simulation to easier learn the internal workings.
Projects can be transferred between Kinetis parts without needing redesigns and different libraries and also to other parts, such as i.MX RT, with virtually no effort.

Regards

Mark

Complete Kinetis solutions for faster/more efficient professional needs, training and support: http://www.utasker.com/kinetis.html
i.MX RT project compatibility: http://www.utasker.com/iMX.html
Including FreeRTOS integration for all Kinetis parts

Kinetis KE:
- http://www.utasker.com/kinetis/FRDM-KE02Z.html
- http://www.utasker.com/kinetis/FRDM-KE02Z40M.html
- http://www.utasker.com/kinetis/FRDM-KE04Z.html
- http://www.utasker.com/kinetis/FRDM-KE06Z.html
- http://www.utasker.com/kinetis/FRDM-KE15Z.html

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https://community.nxp.com/thread/512558
https://community.nxp.com/thread/352862
https://community.nxp.com/thread/498809

723 Views
astrogreco
Contributor II

Hi Mark,

Thank you very much for the complete answer!

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