LPTMR clocked by MCGIRCLK

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LPTMR clocked by MCGIRCLK

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vinkar
Contributor III

Hello,

I am using the kl05-FRDM board. I am toggling a pin (LED) pin with the LPTMR0. This timer is clocked by the internal 32KH oscillator.

With a prescaler of 2 (divided by 2). It shld give me at least a period of (1/16000 = 62uSecs). This I did by putting '1' in the LPTMR0_CMR register.

Whenever there is a timeout it toggles a pin. But, always its in mscs and not uSecs.

Is there some error in this. I am posting my code below. Kindly help me

#include "derivative.h" /* include peripheral declarations */

int main(void)

{

        int count;

        uint16_t countTemp = 0;

          SIM_SOPT1 = 0x00040000;

          SIM_SCGC5 |= (SIM_SCGC5_LPTMR_MASK | SIM_SCGC5_PORTB_MASK);

          PORTB_PCR8 |= 0x00000100;    // alternative pin mux selection //

          GPIOB_PDDR |= 0x00000100;    // pin direction //

          SIM_SCGC5|=SIM_SCGC5_LPTMR_MASK;

          /* Reset LPTMR settings */

          SIM_SOPT1 = 0;

          SIM_SCGC5 |= (SIM_SCGC5_LPTMR_MASK | SIM_SCGC5_PORTB_MASK);

          LPTMR0_CSR=0;

          /* Set the compare value to the number of ms to delay */

          //LPTMR0_PSR = LPTMR_PSR_PCS(1)|LPTMR_PSR_PBYP_MASK;

          LPTMR0_PSR |=LPTMR_PSR_PBYP_MASK;

          //LPTMR0_PSR |=

          LPTMR0_CMR = 1;

          /* Start the timer */

          LPTMR0_CSR |= LPTMR_CSR_TEN_MASK;

          /* Wait for counter to reach compare value */

          while(1){

                  while (!(LPTMR0_CSR & LPTMR_CSR_TCF_MASK));

                  /* Disable counter and Clear Timer Compare Flag */

                  LPTMR0_CSR &= ~LPTMR_CSR_TEN_MASK;

                  LPTMR0_CSR |= LPTMR_CSR_TCF_MASK;

                  GPIOB_PTOR |= (1<<8);

                  LPTMR0_CSR |= LPTMR_CSR_TEN_MASK;

          }

}

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471件の閲覧回数
zhaohuiliu
NXP Employee
NXP Employee

Hi,

Are you enable internal IRC for LPTimer? You should have the code to enable IRCLK before you enable LPTimer to run. Add following code to have a try?

MCG_C1 |= MCG_C1_IRCLKEN_MASK;

Sandy

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471件の閲覧回数
zhaohuiliu
NXP Employee
NXP Employee

Hi,

For Freescale MCUs' clock configuration, it is better to review following chapters of RM once you have any issues:

1. chapter 3 for the IP's clock sources

2. chapter 5 for the MCU clock distribution

3. MCG/OSC chapter for the clock source availability

4. chapter SIM, for the clock switch details mentioned in chapter 3

Thanks,

Sandy

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472件の閲覧回数
zhaohuiliu
NXP Employee
NXP Employee

Hi,

Are you enable internal IRC for LPTimer? You should have the code to enable IRCLK before you enable LPTimer to run. Add following code to have a try?

MCG_C1 |= MCG_C1_IRCLKEN_MASK;

Sandy

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471件の閲覧回数
vinkar
Contributor III

Thank u.

It works :smileyhappy:

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