LLS sleep on K20DXxxx7

[neilhancock]

Hi, I'm trying the LLS sleep on K20DX 72Mhz

I've followed Starting Point for Kinetis Low Power LLS Mode | MCU on Eclipse - really fantastic - thankyou Eric.

The target environment I'm defining is - do some processing then go to sleep for ~5-15minutes. So I use the LPTMR0 for a short term 100mS interrupts, then use the RTC alarm for the longer term sleep.

I have a 32KHz external Xtal and that is used as the basis for the  LPO_1Khz clock.

The board is a custom board - and only has on it the MK20DX126VLH7, 32KHz xtal, and 10K Pullup for JTAG.

For debugging I've set it "processing" to a couple of seconds (flash a LED to to see its working -but ignore it for current consumption) and then sleep 30 seconds - when I can measure sleep current

I can get down to about 160uA while LLS sleep - but haven't been able to reduce it further.

The MK20P64M72SF1 datasheet suggests that IDD_LLS  Max@25C of about 8.6uA.

I've got a "compile debug" flag that I've set to be able to read and list internal registers - and then disable the outputing for the current measurement when the program is operating correctly.

If I take it to a VLSS3 - I still have about 160uA - which makes me think there is a module enabled taking current

I've experimented with turning off as many modules as I can see are enabled by Generated_Code\Cpu.c (included below) - but no luck.

I wonder if anybody has some suggestions?.

Many thanks in advance

Cpu.c: void PE_low_level_init(void)

{

      /* Initialization of the SIM module */

  /* PORTA_PCR4: ISF=0,MUX=7 */

  PORTA_PCR4 = (uint32_t)((PORTA_PCR4 & (uint32_t)~(uint32_t)(PORT_PCR_ISF_MASK)) | (uint32_t)(PORT_PCR_MUX(0x07) ));

        /* Initialization of the RCM module */

  /* RCM_RPFW: RSTFLTSEL=0 */

  RCM_RPFW &= (uint8_t)~(uint8_t)(RCM_RPFW_RSTFLTSEL(0x1F));

  /* RCM_RPFC: RSTFLTSS=0,RSTFLTSRW=0 */

  RCM_RPFC &= (uint8_t)~(uint8_t)(               RCM_RPFC_RSTFLTSS_MASK |               RCM_RPFC_RSTFLTSRW(0x03)              );

        /* Initialization of the FTFL_FlashConfig module */

      /* Initialization of the PMC module */

  /* PMC_LVDSC1: LVDACK=1,LVDIE=0,LVDRE=1,LVDV=0 */

  PMC_LVDSC1 = (uint8_t)((PMC_LVDSC1 & (uint8_t)~(uint8_t)( PMC_LVDSC1_LVDIE_MASK |  PMC_LVDSC1_LVDV(0x03))) | (uint8_t)( PMC_LVDSC1_LVDACK_MASK |  PMC_LVDSC1_LVDRE_MASK));

  /* PMC_LVDSC2: LVWACK=1,LVWIE=0,LVWV=0 */

  PMC_LVDSC2 = (uint8_t)((PMC_LVDSC2 & (uint8_t)~(uint8_t)(  PMC_LVDSC2_LVWIE_MASK | PMC_LVDSC2_LVWV(0x03))) | (uint8_t)( PMC_LVDSC2_LVWACK_MASK));

  /* PMC_REGSC: BGEN=0,ACKISO=0,BGBE=0 */

  PMC_REGSC &= (uint8_t)~(uint8_t)( PMC_REGSC_BGEN_MASK |   PMC_REGSC_ACKISO_MASK |  PMC_REGSC_BGBE_MASK );

        /* Initialization of the LLWU module */

  /* LLWU_PE1: WUPE3=0,WUPE0=0 */

  LLWU_PE1 &= (uint8_t)~(uint8_t)((LLWU_PE1_WUPE3(0x03) | LLWU_PE1_WUPE0(0x03)));

  /* LLWU_PE2: WUPE7=0,WUPE6=0,WUPE5=0,WUPE4=0 */

  LLWU_PE2 = LLWU_PE2_WUPE7(0x00) |

             LLWU_PE2_WUPE6(0x00) |

             LLWU_PE2_WUPE5(0x00) |

             LLWU_PE2_WUPE4(0x00);

  /* LLWU_PE3: WUPE11=0,WUPE10=0,WUPE9=0,WUPE8=0 */

  LLWU_PE3 = LLWU_PE3_WUPE11(0x00) |

             LLWU_PE3_WUPE10(0x00) |

             LLWU_PE3_WUPE9(0x00) |

             LLWU_PE3_WUPE8(0x00);

  /* LLWU_PE4: WUPE15=0,WUPE14=0,WUPE13=0,WUPE12=0 */

  LLWU_PE4 = LLWU_PE4_WUPE15(0x00) |

             LLWU_PE4_WUPE14(0x00) |

             LLWU_PE4_WUPE13(0x00) |

             LLWU_PE4_WUPE12(0x00);

  /* LLWU_ME: WUME7=0,WUME5=1,WUME4=0,WUME3=0,WUME2=0,WUME1=0,WUME0=1 */

  LLWU_ME = (uint8_t)((LLWU_ME & (uint8_t)~(uint8_t)( LLWU_ME_WUME7_MASK | LLWU_ME_WUME4_MASK |  LLWU_ME_WUME3_MASK | LLWU_ME_WUME2_MASK | LLWU_ME_WUME1_MASK ))

                                                    |(uint8_t)( LLWU_ME_WUME5_MASK | LLWU_ME_WUME0_MASK ));

  /* LLWU_FILT1: FILTF=1,FILTE=0,??=0,FILTSEL=0 */

  LLWU_FILT1 = LLWU_FILT1_FILTF_MASK |  LLWU_FILT1_FILTE(0x00) |   LLWU_FILT1_FILTSEL(0x00);

  /* LLWU_FILT2: FILTF=1,FILTE=0,??=0,FILTSEL=0 */

  LLWU_FILT2 = LLWU_FILT2_FILTF_MASK |  LLWU_FILT2_FILTE(0x00) |   LLWU_FILT2_FILTSEL(0x00);

  /* LLWU_RST: ??=0,??=0,??=0,??=0,??=0,??=0,LLRSTE=1,RSTFILT=0 */

  LLWU_RST = LLWU_RST_LLRSTE_MASK;

  /* SMC_PMPROT: ??=0,??=0,AVLP=1,??=0,ALLS=1,??=0,AVLLS=1,??=0 */

  SMC_PMPROT = SMC_PMPROT_AVLP_MASK |  SMC_PMPROT_ALLS_MASK | SMC_PMPROT_AVLLS_MASK;  /* Setup Power mode protection register */

  /* Common initialization of the CPU registers */

  /* NVICIP20: PRI20=0 */

  NVICIP20 = NVIC_IP_PRI20(0x00);

  /* NVICIP21: PRI21=0 */

  NVICIP21 = NVIC_IP_PRI21(0x00);

  /* NVICISER0: SETENA|=0x00200000 */

  NVICISER0 |= NVIC_ISER_SETENA(0x00200000);

  (void)BitIoLdd1_Init(NULL);   LedRed_Init();

  (void)BitIoLdd2_Init(NULL);  LedGrn_Init();

  /* ### TimerInt_LDD "TimerIntLdd1" component auto initialization. Auto initialization feature can be disabled by component property "Auto initialization". */

  (void)TimerIntLdd1_Init(NULL);

  /* ### Asynchro serial "AS1" init code ... */

  AS1_Init();

  /* ### Shell "CLS1" init code ... */

  CLS1_Init(); /* initialize shell */

  /* Enable interrupts of the given priority level */

  Cpu_SetBASEPRI(0U);

}

[neilhancock]

Thanks to Diego and Mark for the hints.

TWR-K20D72M - I don't have one, through I have the FRDM-K20D50

LLS /VLLS - yes I do check on reset. I also tried the VLLS - with the resultant reset but made no difference in STOP mode.

I have done low power board consumption before - and hit some issues in achieving as low a power as I wanted.

With this board I designed it so I could check the low power straight away - and in this case I don't have anything else soldered on the board.

I do have a 10K pullup on a debug port - and I can see when it kicks in as it contributes 300uA. I do final power measurements by disconnecting all external traces.

I don't have clock monitors running, but I need to check if Vref is active.

I did get a response on another thread that was more of the clocking architecture - and I tried it

Using KDS generated SetClockConfiguration() | Freescale Community

Operation modes in Processor Expert

The suggested example is on the FRDM-K20D50 - and I  modified a FRDM-K20D board for measuring power, but still when running the specified clocking scenario it is taking a couple of mA - so something isn't as isolated and I'm not trying to debug it.

I used the example/suggestion to re-architect the clocks on my custom board I've designed - and that appears to reduce the current to about 120uA in STOP mode, and now have the capability to switch between high speed and low power STOP mode.

I can live with 120uA quiescent - but will try and list more of the modules to see what else is active.

[mjbcswitzerland]

Neil

I have done some tests on a FRDM-K20D50M, which you have. Attached is an application that I used for this, whereby I measured the current through J4 (P3V3_K20D50M). I am not sure how accurate this is because there is a leakage path somewhere which allows the processor to still operate when this bridge is completely removed and the voltage is about 2V at the processor. However, some results seem to make sense (that is, about as expected). You could try your code on that board to see whether you get similar results and whether things match up (or are way off).

For the tests I used the 1kHz low power timer as system Tick since this continues running in STOP mode. Also the UART is operational all of the time (although doesn't react well due to PLL oscillator startup/re-lock times when leaving the lowest power modes. Apart from the wakeup times involved from some modes (and UART disturbance) the system operates as if it were running all of the time.

The version attached runs at 48MHz PLL when not sleeping and I measured these currents (PLL continues in STOP mode but stopped in VLPS)

- RUN 15mA, WAIT 9mA, STOP 1mA, VLPS 10us..50uA (fluctuates)

Other tests I did were:

~22MHz internat RC oscillator as clock source (no PLL)

- RUN 8mA, WAIT 5mA, STOP 900uA, VLPS wasn't functional

8MHz external oscillator direct without PLL (oscillator not stopped in STOP modes)

- RUN 4.6mA, WAIT 3.6mA, STOP 350uA, VLPS 250uA

Therefore, if accurate, the best results were 10..50uA in VLPS mode in the first configuration.

During all test the 32kHz RTC was operating.

If you would like to repeat the tests with the attached binary you can load it using the mbed loader and then there is a menu on the VirtualCOM port at 115200Baud.

In the "Admin Menu" the present mode can be viewed with "show_lp" and various modes selected with "set_lp":

"set_lp 0" is RUN mode, "set_LP 1" is WAIT mode, "set_lp 2" is STOP mode, "sel_lp 4" is VLPS mode. Generally one can move between the modes freely unless a mode is entered where the UART becomes unreliable.

The low power mode is entered automatically whenever the processor has nothing to do and woken regularly by the system TICK (50ms) or any other interrupts that can wake from the respective modes. That means that there are short periods of time where the RUN mode is operating so the average current includes such peaks.
It is recommended to perform one power cycle after loading the SW (the low power configuration seems to have a 'memory' and so lower values are only achieved after a power cycle after major re-configurations).

If the lowest values of less than 50uA are correct it would suggest that you should be able to get below 150uA in VLPS.

Regards

Mark

http://www.utasker.com/kinetis.html

[neilhancock]

Hello Mark

Thanks for the .bin - I can load it and pick up the menu. However then I run into the same problems as before which you identified - there is some leakage and connection even with J4 pulled off. So power measurements aren't valid.

I also tried powering directly from 3.3V pin, but then I've unplugged the OpenSDA USB and can't access the menu to put it into LowPower node.

Your figures are interesting - however I'm already achieving ~120uA in STOP/ LLS mode running of 4Mhz internal clock.

Your VLPS figure is better at 50uA - and I can probably try that test on my board fairly easily to see what I get.

I'm using the KDS200 ProcessorExpert to generate the Clock initialization.

I'm mostly moving on to the next phase - getting a USB Host working - and I have a basic outline of that on the mbed but with a L25z and need to reconcile between mbed and KDS 200 environments.

Many thanks.

regards

Neil

[diegocolombo]

Hello

I suggest,if not already done, to check at Reset that you actually woke from LLS or VLLS mode:

//on KL05,names should be slightly differents on K20

if (((SMC_PMCTRL & SMC_PMCTRL_STOPM_MASK)== VLLS)

  &&  ((SMC_STOPCTRL & SMC_STOPCTRL_VLLSM_MASK)== VLLS_3))

  {...

As reason of excessive consumption,basing on my small experience and hints that i've got on this pages, i can only suggest you obvious things.

Check that you don't have any external pullup-down (as on I2C bus)draining current or internall pullup or down enabled on GPIOs,dont let any digital input floating,voltages between H and L can induce leakages in the input totem pole,pin set as analog inputs looks the best to me.Turn off  clock monitors and internal Vref  during sleep.The 32 KHz Xtal should not introduce more than 1uA(by my measurements on KL05)

hope it helps

Diego

[mjbcswitzerland]

Neil

Do you have results on the TWR-K20D72M rather than your custom board?

I did some tests on other evaluation boards - see Using Kinetis Low Power Stop Modes with unrestricted UART operation - a report

and if I load the same test on the TWR-K20D72M I measure about 1.5mA (running at full speed for TICK interrupt once every 50ms, so averaged) whereby I can move between several states (LPTM used as TICK interrupt source from LPO)

#show_lp

0 = RUN                 28mA

1 = WAIT [active]     18mA

2 = STOP               3mA

3 = VLPR

4 = VLPS               1.5mA

5 = LLS                  1.3mA

6 = VLLS0

7 = VLLS1

8 = VLLS2

9 = VLLS3

My main focus hasn't been on getting absolute lowest power but to allow systems to basically behave as if they are working fully and respond to UARTs at any time without losing characters. Also I know that there are some other chips hanging on the same 3V supply on the TWR board which probably also sink some of the measures, meaning that my values are not realyl comparable to yours in this case.

However I am wondering whether you know how much oif teh measured current on te board is other sink current?

I would however look at the 32kHz oscillator as a source of power consumption - the LPO doesn't need it and I have seen that the OSC can require 25us when configured in high gain mode, which may explain some of the additional current that you measure (?).

Regards

Mark