Hi experts
My Customer now using KL02 as a SPI master device in a BMS project, and the slave device which require keep cs pin low all the time during the data transmission otherwise it may lost data.
Our KL02 SPI auto SS function will pull high the cs pin after each byte transmit, so they cannot accept. then we use the PTA5 as GPIO to control the CS pin.
But we met strange issue:
We did our test based on two FRDM-KL02 and KSDK SPI polling sample code.
Just as normal SPI usage, after the basic configure, I pull low the CS pin before the data transmit, pull high after it finished. But I don't know why the destBuff would get an extra "0x00", then it made all data in wrong order.
we checked the waveform, didn't find any issues.
(pic is not clear, yellow line is CS, green line is clock, blue line is data.)
I use the blocking transfer directly, add GPIO operation.
configure spi SS function.
/*******************************************************************************************************************************/
But if I simulate GPIO as the auto-ss function, pull high every time after byte transmission, it could work.
Pull high CS every time.
So, can KL02 keep CS low during data transmission which size larger than 1 byte? or it must be pulled high after each bytes transmit? it couldn't be. Anything I missed?
Please help on it, thanks a lot!
Hi K.h.Qin,
Please modify the master and the slave CPHA to 1, then the problem will be solved.
1. Modify the master clock phase to 1.
2. Modify the slave clock phase to 1
3. Test it.
The SPI wave is:
The Master printf data is:
About the reason, you can find it from the KL02 reference manual:
So, when use the GPIO as the CS, please use the default CPHA=1.
Wish it helps you!
Have a great day,
Kerry
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