KEAZ64 always reset

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KEAZ64 always reset

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kigerzhang
Contributor III

In my KEAZ64 project , when I reference to a pointer , the MCU will reset .  

I have traced the code ,found the value is correct .  But once step to the line :

 

 nTblSize = pTSAInfo->tblSize;

 

the MCU will reset . 

 

Double check the code , NOT found what's wrong. 

I tried in KDS and CW 10.7 ,got the same result .

 

Please help to check it .

 

I simplify all the code  in one file   to demo the issue  as following:

And also attached the KDS project file. 

 

/*
* Copyright (c) 2015, Freescale Semiconductor, Inc.
* All rights reserved.
*
*/

#include "SKEAZ1284.h"

static int i = 0;

 

 

typedef unsigned char FMSTR_U8;
typedef unsigned short FMSTR_U16;

typedef unsigned char *FMSTR_ADDR;
typedef unsigned char FMSTR_BCHR;
typedef unsigned char* FMSTR_BPTR;

typedef unsigned char BOOL;
typedef unsigned char BYTE;
typedef unsigned short WORD;
typedef unsigned long DWORD;
typedef void * LPVOID;

#define NULL 0

typedef struct
{
//feed para

FMSTR_U8 cmd; //command code ,the response is for this cmd
FMSTR_U8 len; // command data len
FMSTR_U8 subitem; // sub imtem
FMSTR_U8 ReadMemEX_Size; // size for readMemEX
FMSTR_ADDR ReadMemEX_Addr; // address for readMemEX

FMSTR_BPTR pData; // point to data IO buffer
//return para
FMSTR_U8 status; //command return status


} MCB_RESP,*pMCB_RESP;

typedef struct
{
WORD tsaFlags;
WORD tblSize;
DWORD tblAddr;

} MCB_RESP_GETTSAINFOEX, * LPMCB_RESP_GETTSAINFOEX;

static FMSTR_BCHR pcm_pCommBuffer[67];
static MCB_RESP FMSTR_CMD_RESP;
static FMSTR_BPTR pcm_pRxBuff;

 

int main(void)
{

/* Write your code here */
LPMCB_RESP_GETTSAINFOEX pTSAInfo;
pMCB_RESP pCmdResp =NULL;
MCB_RESP ** ppCmdResp;

FMSTR_U16 nTblSize;

 


pcm_pRxBuff = pcm_pCommBuffer;
*pcm_pRxBuff++ = 0x00;
*pcm_pRxBuff++ = 0x02;
*pcm_pRxBuff++ = 0x01;
*pcm_pRxBuff++ = 0x00;
*pcm_pRxBuff++ = 0x02;
*pcm_pRxBuff++ = 0xEC;
*pcm_pRxBuff++ = 0x92;
*pcm_pRxBuff++ = 0x00;
*pcm_pRxBuff++ = 0x00;
*pcm_pRxBuff++ = 0x7D;


FMSTR_CMD_RESP.pData = pcm_pCommBuffer+1;

ppCmdResp = & pCmdResp;
*ppCmdResp = & FMSTR_CMD_RESP;

pTSAInfo = (LPMCB_RESP_GETTSAINFOEX)(pCmdResp->pData);
nTblSize = pTSAInfo->tblSize;  // Run to here, the MCU will reset 

 

 

 


/* This for loop should be replaced. By default this loop allows a single stepping. */
for (;;) {
i++;
}
/* Never leave main */
return 0;
}
////////////////////////////////////////////////////////////////////////////////
// EOF
////////////////////////////////////////////////////////////////////////////////

Original Attachment has been moved to: keaz64_t1.zip

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1 Solution
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mjbcswitzerland
Specialist V

Hi

The Cortex m0+ (in KEA) can't access unaligned addresses.

Your code is assigning an unaligned address to a struct pointer and so when

nTblSize = pTSAInfo->tblSize;  // Run to here, the MCU will reset

is executed it will be trying to read a short word from an unaligned address in RAM.

This is the line that more or less forces the failure:

FMSTR_CMD_RESP.pData = pcm_pCommBuffer + 1;

as pcm_pCommBuffer[] is very probably aligned to start on a long word boundary (but possibly not guaranteed) so you are forcing a misaligned struct pointer.

Cortex m4 will work since it supports misaligned addressing (but is slower in the process).

Therefore it is not a compiler or IDE problem but incorrect code design in a Cortex m0+ environment.

You will need to rework the buffer design to ensure that if you want to access using struct pointers that the byte array memory is suitably (and guaranteed ) aligned. Alternatively you could do

typedef struct
{
    unsigned char tsaFlags[2];
    unsigned char tblSize[2];
    unsigned long tblAddr[4];

} MCB_RESP_GETTSAINFOEX, *LPMCB_RESP_GETTSAINFOEX;

nTblSize = ((pTSAInfo->tblSize[0] << 8) | pTSAInfo->tblSize[1]);

to ensure no access risks but it is a bit fiddly and less efficient (but very safe and unconditionally portable).

Regards

Mark

Professional support for Kinetis: http://www.utasker.com/index.html
Remote desktop one-on-one coaching: http://www.utasker.com/services.html
Getting started to expert videos: https://www.youtube.com/results?search_query=utasker+shorts

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636 Views
mjbcswitzerland
Specialist V

Hi

The Cortex m0+ (in KEA) can't access unaligned addresses.

Your code is assigning an unaligned address to a struct pointer and so when

nTblSize = pTSAInfo->tblSize;  // Run to here, the MCU will reset

is executed it will be trying to read a short word from an unaligned address in RAM.

This is the line that more or less forces the failure:

FMSTR_CMD_RESP.pData = pcm_pCommBuffer + 1;

as pcm_pCommBuffer[] is very probably aligned to start on a long word boundary (but possibly not guaranteed) so you are forcing a misaligned struct pointer.

Cortex m4 will work since it supports misaligned addressing (but is slower in the process).

Therefore it is not a compiler or IDE problem but incorrect code design in a Cortex m0+ environment.

You will need to rework the buffer design to ensure that if you want to access using struct pointers that the byte array memory is suitably (and guaranteed ) aligned. Alternatively you could do

typedef struct
{
    unsigned char tsaFlags[2];
    unsigned char tblSize[2];
    unsigned long tblAddr[4];

} MCB_RESP_GETTSAINFOEX, *LPMCB_RESP_GETTSAINFOEX;

nTblSize = ((pTSAInfo->tblSize[0] << 8) | pTSAInfo->tblSize[1]);

to ensure no access risks but it is a bit fiddly and less efficient (but very safe and unconditionally portable).

Regards

Mark

Professional support for Kinetis: http://www.utasker.com/index.html
Remote desktop one-on-one coaching: http://www.utasker.com/services.html
Getting started to expert videos: https://www.youtube.com/results?search_query=utasker+shorts

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