Hello
I m trying configure SAI0 as regular transmitter, everything working fine but on output I2S0_TXD0 I have no data
MCLK, I2S0_TX_FS, I2S0_TX_BCLK work good.
I push data into I2S0_TDR0 and in interrupt from SAI check FRF bit from TCSR register
Thank You for answers and help.
here is my config:
SIM_SCGC6 |= SIM_SCGC6_SAI0_MASK; | // enable I2S module |
I2S0_TCR1 |= I2S_TCR1_TFW(3); | //watermark level |
I2S0_TCR2 |= I2S_TCR2_MSEL(1) | | //MCLK select from CLKGEN | |||||||
I2S_TCR2_BCD_MASK | | // bit clock direction | |||||||
I2S_TCR2_DIV(0); | // from MCLK divider to BCLK (max 256) |
I2S0_TCR3 |= I2S_TCR3_TCE(2); | // Transmit channel enable; TDR0=2; TDR1=1 ???? |
I2S0_TCR4 |= I2S_TCR4_FRSZ(1) | | //number of words in frame | |||||||
I2S_TCR4_SYWD(31) | | //number bits in frame | |||||||
I2S_TCR4_MF_MASK | | //frame sync polarity MSB/LSB first | |||||||
I2S_TCR4_FSE_MASK | | //Frame sync early: log.0 Justified, log.1 I2S | |||||||
I2S_TCR4_FSD_MASK; | //frame sync direction |
I2S0_TCR5 |= I2S_TCR5_WNW(31) | | // number of bits in next word | |||||||
I2S_TCR5_W0W(31) | | // number of bits in first word | |||||||
I2S_TCR5_FBT(31); | //first bit shiffed |
I2S0_MCR |= I2S_MCR_MOE_MASK | | //MCLK generated internally | |||||||
I2S_MCR_MICS(3); | //MCLK input clock select from PLL=120 MHz |
I2S0_MDR |= I2S_MDR_DIVIDE(999)| | //2722 | (fract + 1) | ||||||||||||||||
I2S_MDR_FRACT(6); | // | MCLKout = MCLKin * ------------- | ||||||||||||||||
// | (divide +1) |
PORTE_PCR6 |= PORT_PCR_MUX(0x04); | // configure port for MCLK output | |
PORTE_PCR10 |= PORT_PCR_MUX(0x04); | // configure port for I2S0_TXD0 | |
PORTE_PCR11 |= PORT_PCR_MUX(0x04); | // configure port for I2S0_TX_FS | |
PORTE_PCR12 |= PORT_PCR_MUX(0x04); | // configure port for I2S0_TX_BCLK |
I2S0_TCSR |= I2S_TCSR_TE_MASK | | //enable transmitter | |||||||
I2S_TCSR_STOPE_MASK | | //stop enable | |||||||
I2S_TCSR_FR_MASK | | //reset fifo pointers | |||||||
I2S_TCSR_FRIE_MASK ; | //enable interrupt from watermark |
by the way... in manual nothing say this thing!!
by the way... in TCR3 bits TCE: 16-th bit represents FIFO "0" (TDR0,TFR0)
17-th bit represents FIFO "1" (TDR1,TFR1)
Hello Adam.
Right now I'm having the same problems you had with SAI. I was wondering if you can send me that part of code. I really will appreciate it.
Thanks in advance.
Or is there somebody who have example SAI (I2S) as transmitter for K70 ???
Thank you so much.
I can only suggest my I2S/DMA example in community.freescale.com/thread/114450. It was written for version 1 silicon, so if you have the 'version 2' SAI block in your chip, I'm afraid there will be differences.
Hi thank you for response, but Your code looks like for K60... it is different I2S interface :smileysad:
Adam
Sorry -- that was my concern about the 'Version 1' vs 'Version 2' silicon.
But these can help, I have "Device revision number: 0" of K70FN1M0VMJ12, maybe itis old
Sorry again, 'version' can be a tricky thing to pin down. I refer specifically to the differences outlined in AN4445.pdf. I would say your original statement is correct, in that my firmware was designed for the SSI, and newer parts have this SAI which is 'similar' but to be sure differs in some very serious ways. Sorry I can't be of more help.
Just as a 'simple statement' totally unrelated to the exact details of the SAI --- I see most of your register controls are set with 'OR-equals' operators, and I would certainly be more inclined to directly set the full contents of many of these control registers, most especially the PORT_PCR controls.
Hi, Thank you for your reply, now I understand what you meant (difference between SSI and SAI),
but nothing solved my problem :smileycry:
I tried PORTE_PCR10 = PORT_PCR_MUX(0x04); and all configure register with "="
Can be problem that I´m using MQX? by the way, MQX never touch PTE10