Hi I am newbie for embeded programming and ı have problem with spi I am trying to write basic spi to see going datas with logic analyzer but as ı see data not going. if you can help me where is the problem ı will be happy.
My code is here :
#include "MK64F12.h"
void initspi();
#define SPI_PUSHR_PCS0_ON 0x10000
#define SPI_CTAR_FMSZ_8BIT 0x38000000
void initspi(){
SIM_SCGC5 |= SIM_SCGC5_PORTD_MASK; // PortD clock --SPI CONNECTIONS-- OK!
SIM_SCGC6 |= SIM_SCGC6_SPI0_MASK; // SPI0 Module Clock OK!
//Pin Muxing..
PORTD_PCR0 |= PORT_PCR_MUX(2); // SPI0 SS
PORTD_PCR1 |= PORT_PCR_MUX(2); //SPI0_SCK
PORTD_PCR2 |= PORT_PCR_MUX(2); //SPI0_SOUT
PORTD_PCR3 |= PORT_PCR_MUX(2); //SPI0_SIN
//Clear All Bits
SPI0_SR = (SPI_SR_TCF_MASK | SPI_SR_EOQF_MASK | SPI_SR_TFUF_MASK | SPI_SR_TFFF_MASK | SPI_SR_RFOF_MASK | SPI_SR_RFDF_MASK); //clear the status bits (write-1-to-clear)
SPI0_TCR = 0;
SPI0_RSER = 0;
SPI0_PUSHR = 0; //Clear out PUSHR register. Since DSPI is halted, nothing should be transmitted
SPI0_CTAR0 = 0;
//SPI_MCR
SPI0_MCR |= SPI_MCR_MSTR_MASK; // Set Master.
SPI0_MCR &= ~SPI_MCR_CONT_SCKE_MASK; // Continuous SCK Disable
SPI0_MCR &= ~SPI_MCR_FRZ_MASK; // Do not halt serial transfers in Debug mode
SPI0_MCR |= SPI_MCR_PCSIS_MASK; //The inactive state of PCSx is high.
SPI0_MCR &= (~SPI_MCR_DIS_RXF_MASK & ~SPI_MCR_DIS_TXF_MASK); // enable FIFOs
//CTAR Settings
SPI0_CTAR0 &= ~SPI_CTAR_DBR_MASK; // DBR 0
SPI0_CTAR0 |= SPI_CTAR_FMSZ_8BIT; // 8bit(7+1)
SPI0_CTAR0 |= SPI_CTAR_PBR(0); // Baud Rate Prescaler value is 2.
SPI0_CTAR0 &= ~SPI_CTAR_CPOL_MASK; // CPOL 0
SPI0_CTAR0 &= ~SPI_CTAR_CPHA_MASK; // CPHA 0
SPI0_CTAR0 |= SPI_CTAR_BR(6); //500khz at 60Mhz = > 468.75Khz
}
int main(void)
{
initspi();
SPI0_MCR |= (SPI_MCR_CLR_RXF_MASK | SPI_MCR_CLR_TXF_MASK); //flush the fifos
SPI0_SR |= (SPI_SR_TCF_MASK | SPI_SR_EOQF_MASK | SPI_SR_TFUF_MASK | SPI_SR_TFFF_MASK | SPI_SR_RFOF_MASK | SPI_SR_RFDF_MASK); //clear the status bits (write-1-to-clear)
SPI0_TCR |= SPI_TCR_SPI_TCNT_MASK;
SPI0_MCR &= (~SPI_MCR_MDIS_MASK & ~SPI_MCR_HALT_MASK); //enable SPI and start transfer
while(1){
SPI0_PUSHR = 0x2d;
while(!(SPI0_SR & SPI_SR_TCF_MASK));
SPI0_SR |= SPI_SR_TFFF_MASK; //clear the status bits (write-1-to-clear)
}
return 0;
}
Thank you for any help and idea
Please have a look at MCUXpresso SDK.
It contain a lot of software examples demonstrating the usage of peripheral drivers, RTOS wrapper drivers, middleware and RTOS.
Best Regards,
Robin
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Hi I fixed the problem here working code :
#include "MK64F12.h"
void spiinit();
void spiinit(){
//Clock settings
SIM_SCGC5 |= SIM_SCGC6_SPI0_MASK;
SIM_SCGC6 |= SIM_SCGC5_PORTD_MASK;
//Port Settings
PORTD_PCR0 |= PORT_PCR_MUX(2);
PORTD_PCR1 |= PORT_PCR_MUX(2);
PORTD_PCR2 |= PORT_PCR_MUX(2);
PORTD_PCR3 |= PORT_PCR_MUX(2);
SPI0_RSER = 0;
SPI0_TCR = 0;
SPI0_SR = (SPI_SR_TCF_MASK | SPI_SR_TXRXS_MASK | SPI_SR_EOQF_MASK | SPI_SR_TFUF_MASK | SPI_SR_TFFF_MASK | SPI_SR_RFOF_MASK | SPI_SR_RFDF_MASK);
SPI0_MCR =0;
SPI0_MCR = SPI_MCR_MSTR_MASK | (0 << SPI_MCR_FRZ_SHIFT) | SPI_MCR_PCSIS(1) | SPI_MCR_DCONF(0) | (1 << SPI_MCR_DIS_TXF_SHIFT) | (1 << SPI_MCR_DIS_RXF_SHIFT) | (1 << SPI_MCR_CLR_TXF_SHIFT) | (1 << SPI_MCR_CLR_RXF_SHIFT) | (1 << SPI_MCR_HALT_SHIFT);
SPI0_CTAR0 = 0;
SPI0_CTAR0 |= (0 << SPI_CTAR_DBR_SHIFT) | SPI_CTAR_FMSZ(7) | (0 << SPI_CTAR_CPOL_SHIFT) | (0 << SPI_CTAR_CPHA_SHIFT) | (0 << SPI_CTAR_LSBFE_SHIFT) | SPI_CTAR_PCSSCK(0) | SPI_CTAR_CSSCK(1) | SPI_CTAR_ASC(0) | SPI_CTAR_PDT(3) | SPI_CTAR_DT(5) | SPI_CTAR_BR(1);
}
int main(void)
{
spiinit();
for(;;){
SPI0_MCR &= ~(SPI_MCR_HALT_MASK | SPI_MCR_FRZ_MASK);
SPI0_SR &= ~SPI_SR_EOQF_MASK;
SPI0_PUSHR = (SPI_PUSHR_EOQ_MASK | SPI_PUSHR_PCS(1) | 0x01);
while(!(SPI0_SR | SPI_SR_TCF_MASK));
SPI0_SR |= SPI_SR_TCF_MASK | SPI_SR_EOQF_MASK;
SPI0_MCR |= SPI_MCR_HALT_MASK;
}
return 0;
}
Dear Rasit Yilmaz
I used the following code for initializing my SPI0 in FRDM K82 board,
But I do not see clock and MOSI data through scope and data except chip select, Can you please help me.
void spiinit()
{
//Clock settings
SIM->SCGC5 |= SIM_SCGC5_PORTD_MASK; //
SIM->SCGC6 |= SIM_SCGC6_SPI0_MASK;
//Port Settings
PORTD->PCR[0] |= PORT_PCR_MUX(2); // CS
PORTD->PCR[1] |= PORT_PCR_MUX(2); // SCK
PORTD->PCR[2] |= PORT_PCR_MUX(2); // SOUT
PORTD->PCR[3] |= PORT_PCR_MUX(2); // SIN
SPI0->MCR =0;
SPI0->CTAR[0] = 0;
//-------------------------------------
SPI0->MCR |= SPI_MCR_MSTR_MASK;
SPI0->MCR |= SPI_MCR_DCONF(0)|(0 << SPI_MCR_FRZ_SHIFT);
SPI0->MCR |= SPI_MCR_PCSIS(1) | SPI_MCR_MDIS(0); // Module enable
SPI0->MCR |= (1 << SPI_MCR_DIS_TXF_SHIFT)| (1 << SPI_MCR_DIS_RXF_SHIFT);
SPI0->MCR |= (1 << SPI_MCR_HALT_SHIFT); // stop transfer
PRINTF("SPI0->MCR=%x\n",SPI0->MCR);
SPI0->CTAR[0] |= (0 << SPI_CTAR_DBR_SHIFT);
SPI0->CTAR[0] |= SPI_CTAR_FMSZ(15); // frame size 16
SPI0->CTAR[0] |= (0 << SPI_CTAR_CPOL_SHIFT);// CPOL=0;
SPI0->CTAR[0] |= (0 << SPI_CTAR_CPHA_SHIFT);// CPHA=0;
SPI0->CTAR[0] |= (0 << SPI_CTAR_LSBFE_SHIFT);//MSB first
SPI0->CTAR[0] |= SPI_CTAR_PCSSCK(0) ;
SPI0->CTAR[0] |= SPI_CTAR_CSSCK(1) ;
SPI0->CTAR[0] |= SPI_CTAR_ASC(0) ;
SPI0->CTAR[0] |= SPI_CTAR_PDT(3) ;
SPI0->CTAR[0] |= SPI_CTAR_DT(5) ;
SPI0->CTAR[0] |= SPI_CTAR_BR(1);
PRINTF("SPI0->CTAR[0]=%x\n",SPI0->CTAR[0]);
SPI0->SR = SPI_SR_TFFF(1); // cleared by writing 1 after module enable
SPI0->RSER = SPI_RSER_TCF_RE(1)|SPI_RSER_EOQF_RE(1);
}
int main(void)
{
BOARD_InitPins();
BOARD_BootClockRUN();
BOARD_InitDebugConsole();
spiinit();
SpiWrite = 0x8180;
SPI0->MCR &= ~(SPI_MCR_HALT_MASK | SPI_MCR_FRZ_MASK);
SPI0->SR &= ~SPI_SR_EOQF_MASK;
SPI0->PUSHR = (SPI_PUSHR_EOQ_MASK | SPI_PUSHR_PCS(1) | SpiWrite);
while(!(SPI0->SR & SPI_SR_TCF_MASK));
SPI0->SR |= SPI_SR_TCF_MASK | SPI_SR_EOQF_MASK;
SPI0->MCR |= SPI_MCR_HALT_MASK;
for(;;) { /* Infinite loop to avoid leaving the main function */
__asm("NOP"); /* something to use as a breakpoint stop while looping */
}
}
Please help if there is any mistake.
Thanks
Gokul.
Please add this part inside for loop :
SPI0->MCR &= ~(SPI_MCR_HALT_MASK | SPI_MCR_FRZ_MASK);
SPI0->SR &= ~SPI_SR_EOQF_MASK;
SPI0->PUSHR = (SPI_PUSHR_EOQ_MASK | SPI_PUSHR_PCS(1) | SpiWrite);
while(!(SPI0->SR & SPI_SR_TCF_MASK));
SPI0->SR |= SPI_SR_TCF_MASK | SPI_SR_EOQF_MASK;
SPI0->MCR |= SPI_MCR_HALT_MASK;
And SPI_MCR_MDIS(0); ı am not sure but as ı remember after init make module active
I hope it will work..