K20: Can the comparator reset PWM?

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K20: Can the comparator reset PWM?

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jrychter
Contributor V

Is there any way to set up the comparator and FTM so that the comparator output acts as a PWM reset (e.g. does the same thing as when the counter reaches CnV)?

I'd like to generate two complementary PWM drive signals with dead-time insertion, but I'd like the actual duty time to be driven by the comparator. Having looked in the K20SFRM I found no way to do that (DMA came closest, but is too slow and doesn't solve the problem of loading a non-zero CnV value for the next cycle), but perhaps I missed something?

Would an external connection help? This is on a K20.

Any advice/hints appreciated!

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jeremyzhou
NXP Employee
NXP Employee

Hi Jan,

After I've had a brief through your question, I'm a littel confused about it and I'd like to confirm.

1. As you mentioned, the two complementary PWM're driven by comparator output, is it mean use the falling-edge or rising-edge of comparator output as a trigger to start the two complementary PWM?

2. Do the two complementary PWM's fequency and width keep same after reset?

I'm looking forward to your reply.
Have a great day,
Ping

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jrychter
Contributor V

I'm sorry, I wasn't very clear.

I'd like to use the rising-edge of comparator output, but not to start the PWM, but to set/reset the signals. The PWM period remains the same, but width depends on when the comparator output becomes high. Perhaps the following picture will help:

ftm-pwm-cmp.png

In the picture, the first two waveforms are (roughly) complementary FTM outputs with dead-time. The red lines denote the period. The third waveform is one of the comparator inputs, and the last waveform is comparator output.

As you can see, I'd like to ignore the CnV value, and drive the PWM width through the comparator output. Is this possible at all?

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jeremyzhou
NXP Employee
NXP Employee

Hi Jan,

Thanks for your reply and  explain your question again.

I think I've figure out your purpose now. If you want change the width of PWM in next period when rising-edge of comparator output arrive. you should load a different value to CnV register.

And I'd like to suggest you'd better revise the C(n)V update operation in reference manual.

1.jpg


Have a great day,
Ping

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jrychter
Contributor V

No, this will not work. I need *every* pulse to last until comparator output rising-edge. Loading a different CnV value is a) too slow, even using DMA, b) doesn't solve much, because I'd have to load a 0 to make sure to cut the pulse short, and then I'd have to somehow make sure the output becomes high in the next PWM period.

Never mind. I don't think this can be done with Kinetis peripherals.

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jeremyzhou
NXP Employee
NXP Employee

Hi Jan,

Thanks for your reply.

According to your response, Yes, I think the FTM module is incapable of this implemention.

Thank for you very much for your focus on Freescale Kinetis product.

If you have other questions, please feel free to contact with me.
Have a great day,
Ping

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