How can I get the CnV Register to Update for a simple FTM-PWM at counter reload time on KV10

[mlnj]

I understand that writing to e.g., FTM0_C1V writes to a shadow register (which I apparently cannot see, at least with KDS).  But I cannot get that value to transfer out of the shadow register.  I would most like it to be transferred out when the PWM Counter is reloaded, but I would also like to know how to make it happen immediately upon writing to the shadow register. 

I am trying to do this without your "drivers."  I'm setting FTM=1 and CLKS[1:0] ≠ 0:0.  I would note that in the manual I have (KV10P48M75RMRev. 7, September 2014) only discusses non-output compare mode and SYNCEN = 1.   I'm trying to get a single edge-mode PWM going.  At least initially, I don't care about synchronization with other PWMs.  And I only see SYNCENn's defined.  I do not see a single SYNCEN bit.

Note that if I set FTMEN=0, everything works the way I expect it to for now but I know that eventually I will want capabilities like Deadtime which only exist when FTMEN=1.

Code is attached.

Original Attachment has been moved to: main.c.zip

Original Attachment has been moved to: HdwrRegDefn.h.zip

[Hui_Ma]

Hi

For the customer is using a single-edge PWM mode of FTM module, the CnV register update doesn't  support combined mode PWM synchronization (C(n)V and C(n+1)V register synchronization).

As table 35-245 shows, customer need to select below CnV synchronization way(with red rectangle):

Wish it helps.

Have a great day,
Ma Hui
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[mlnj]

I’m not sure I understand what I can or cannot do. I’ve tried all sorts of setups and NONE of them work.

Perhaps you could send me an example of ANY PWM setup with FTMEN=1 where the CnV register is updated immediately after its shadow is written to or at the next counter reload point, but without writing to any other register.

[Hui_Ma]

Hi

1> Below example is about combine PWM C(n)V & C(n+1)V register synchronization:

void FTM_Sync_Trigger (void)

{

 SIM_SCGC6 |= SIM_SCGC6_FTM0_MASK; /* Enable clock for FTM0 */

 PORTC_PCR1 = (0|PORT_PCR_MUX(4)); /* FTM0_CH0 enable on PTC1 */

 PORTC_PCR2 = (0|PORT_PCR_MUX(4)); /* FTM0_CH1 enable on PTC2 */

 /* FTM0 init */

 /* Configure FTM0CH0 and FTM0CH1 as PWM combineed operation for syncronization test*/ 

 FTM0_MODE = 0x05; /* FTM features are enabled ans write protection is disabled */

 FTM0_COMBINE = 0x23;  /* Combine is enabled, Output CH0 and CH1 are complementary */

 FTM0_C0SC = 0x28; /* High true PWM */

 FTM0_C1SC = 0x28;

 FTM0_MOD = 999; /* Initial value of FTM0 */  

 FTM0_CNTIN = 0;

 FTM0_C0V =  100;

 FTM0_C1V =  800;

 FTM0_SC  = 0x08; /*Start Timer,FTM CLOCK = BUSCLK /1 */

   FTM0_SYNCONF = 0x00000034; //Legacy PWM synchronization is selected.

   FTM0_SYNC = 0x03;   

 FTM0_C0V = 200;

 FTM0_C1V = 400;

 FTM0_SYNC = 0x83;   

 printf("Check the register value changed after synchronization\r\n");

/*

 FTM0_C0V =  100;

 FTM0_C1V =  800;

 printf("Check the register still keep previous value before new synchronization\r\n");

 printf("FTM0_C0V = %x\r\n",FTM0_C0V);

 printf("FTM0_C1V = %x\r\n",FTM0_C1V);

   FTM0_SYNC = 0x83;   

 printf("Check the register value changed after synchronization\r\n");

 printf("FTM0_C0V = %x\r\n",FTM0_C0V);

 printf("FTM0_C1V = %x\r\n",FTM0_C1V);

*/

}

2> There also with another way to update the FTM CnV register with CLKS[1:0] = 0:0

The PWM mode, such as EPWM, CPWM and Combine PWM can use this way to update CnV register.

Attached is example code to update CnV register for CPWM and Combine PWM mode with CLKS[1:0] = 0:0:

Wish it helps.

Have a great day,
Ma Hui
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Note: If this post answers your question, please click the Correct Answer button. Thank you!
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