Hi, I am using the following:
EVM: FRDM-KL26Z
IDE: MCUXpresso IDE v11.0.1 [Build 2563] [2019-09-01]
SDK: SDK_2.2.0_FRDM-KL26Z
I created a project by clicking the new project menu.
I step debug and found out at the PORT_SetPinMux as shown below in the routine where it triggers hardfault ISR.
void BOARD_InitPins(void) {
CLOCK_EnableClock(kCLOCK_PortA); /* Port A Clock Gate Control: Clock enabled */
PORT_SetPinMux(PORTA, PIN1_IDX, kPORT_MuxAlt2); /* PORTA1 (pin 23) is configured as UART0_RX */
PORT_SetPinMux(PORTA, PIN2_IDX, kPORT_MuxAlt2); /* PORTA2 (pin 24) is configured as UART0_TX */
SIM->SOPT5 = ((SIM->SOPT5 &
(~(SIM_SOPT5_UART0TXSRC_MASK | SIM_SOPT5_UART0RXSRC_MASK))) /* Mask bits to zero which are setting */
| SIM_SOPT5_UART0TXSRC(SOPT5_UART0TXSRC_UART_TX) /* UART0 Transmit Data Source Select: UART0_TX pin */
| SIM_SOPT5_UART0RXSRC(SOPT5_UART0RXSRC_UART_RX) /* UART0 Receive Data Source Select: UART_RX pin */
);
/* added*/
PORT_SetPinMux(PORTD, PIN5_IDX, kPORT_MuxAsGpio); // PORTD5 (pin 5) is configusred as gpio
PORT_SetPinMux(PORTE, PIN29_IDX, kPORT_MuxAsGpio); // PORTE29 (pin 29) is configured as gpio
PORT_SetPinMux(PORTE, PIN31_IDX, kPORT_MuxAsGpio); // PORTE17 (pin 31) is configured as gpio
GPIO_PinInit(GPIOE, PIN29_IDX, &gpio_setoutput_config);
GPIO_PinInit(GPIOE, PIN31_IDX, &gpio_setoutput_config);
GPIO_PinInit(GPIOD, PIN5_IDX, &gpio_setoutput_config);
// added
/**/
What's wrong?
Thanks,
Neo
I already found the solution. I just need to enable the clock to the portD and portE using CLOCK_EnableClock() function.
Thanks anyway.