Clear Thumb bit in xPSR of K60N512 ( Cortex M4 )

cancel
Showing results for 
Show  only  | Search instead for 
Did you mean: 

Clear Thumb bit in xPSR of K60N512 ( Cortex M4 )

Jump to solution
1,435 Views
Thommi_Tulpe
Contributor IV

Hello,
i have to write a little Assembler for the K60N512 which
runs on the processor. For that I have to clear the Thumb Bit in
the xPSR (EPSR) Register. I only want to use 32-bit ARM-Instructions
I can read the Register with MRS ro, xpsr    but I cant
clear the Bit.

 

How can I swich from Thumb to 32-bit Instruction Mode and reverse?

 

Hope someone can help

Thomas

0 Kudos
1 Solution
931 Views
Thommi_Tulpe
Contributor IV

Thank you Mark, thank you Richard:smileyhappy:

View solution in original post

0 Kudos
3 Replies
931 Views
FreeRTOS_org
Contributor IV

You cannot clear the thumb bit on a Cortex-M processor, it is fixed.  The processor runs in Thumb2 only, which is a mix of 16 and 32 bit instructions.

0 Kudos
932 Views
Thommi_Tulpe
Contributor IV

Thank you Mark, thank you Richard:smileyhappy:

0 Kudos
931 Views
mjbcswitzerland
Specialist V

Thomas

 

I am not 100% sure, but I thought that the Cortex M4 operates only in Thumb2 mode and so there is no Thumb and ARM modes which can be switched between.

 

The ARM7/9 uses the Thumb/ARM modes to compromise between instruction efficiency and code size but I thought that Thumb2 was based on an automatic best mix of these.

 

On the ARM one can force between modes by aligning the code accordingly. Jumping to an even address causes ARM mode and jumping to an odd address causes Thumb mode (therefore aligning code on an even boundary automatically cause it to be executed in ARM mode - the instructions also need to match the mode too though...).

 

Regards

 

Mark

 

0 Kudos