Clear Thumb bit in xPSR of K60N512 ( Cortex M4 )

[Thommi_Tulpe]

Hello,
i have to write a little Assembler for the K60N512 which
runs on the processor. For that I have to clear the Thumb Bit in
the xPSR (EPSR) Register. I only want to use 32-bit ARM-Instructions
I can read the Register with MRS ro, xpsr    but I cant
clear the Bit.

How can I swich from Thumb to 32-bit Instruction Mode and reverse?

Hope someone can help

Thomas

[FreeRTOS_org]

You cannot clear the thumb bit on a Cortex-M processor, it is fixed.  The processor runs in Thumb2 only, which is a mix of 16 and 32 bit instructions.

[Thommi_Tulpe · Accepted solution]

Thank you Mark, thank you Richard

[mjbcswitzerland]

Thomas

I am not 100% sure, but I thought that the Cortex M4 operates only in Thumb2 mode and so there is no Thumb and ARM modes which can be switched between.

The ARM7/9 uses the Thumb/ARM modes to compromise between instruction efficiency and code size but I thought that Thumb2 was based on an automatic best mix of these.

On the ARM one can force between modes by aligning the code accordingly. Jumping to an even address causes ARM mode and jumping to an odd address causes Thumb mode (therefore aligning code on an even boundary automatically cause it to be executed in ARM mode - the instructions also need to match the mode too though...).

Regards

Mark