Can't get UART out on KL25

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Can't get UART out on KL25

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1,591件の閲覧回数
brintonengineer
Contributor III

Hello,

I can't seem to figure out what I've forgotten on my UART0 TX to pin A2 configuration:

// set Radio Synchronous RX (pin A2)
PORTA_PCR2 = PORT_PCR_DSE_MASK | PORT_PCR_MUX(0x2); // UART0_TX

  /* UART0_C2: TE=0,RE=0 */

  UART0_C2 &= (uint8_t)~(uint8_t)((UART0_C2_TE_MASK | UART0_C2_RE_MASK));                                  

  /* UART0_BDL: SBR=0x3C */

  UART0_BDL = UART0_BDL_SBR(0x3C);                                  

  /* UART0_BDH: LBKDIE=0,RXEDGIE=0,SBNS=0,SBR=0 */

  UART0_BDH = UART0_BDH_SBR(0x00);                                  

  /* UART0_MA1: MA=0 */

  UART0_MA1 = UART0_MA1_MA(0x00);                                  

  /* UART0_MA2: MA=0 */

  UART0_MA2 = UART0_MA2_MA(0x00);                                  

  /* UART0_C4: MAEN1=0,MAEN2=0,M10=0,OSR=0x1F */

  UART0_C4 = UART0_C4_OSR(0x1F);                                  

  /* UART0_C1: LOOPS=0,DOZEEN=0,Rsrc=0,M=0,WAKE=0,ILT=0,PE=0,PT=0 */

  UART0_C1 = 0x00U;                                  

  /* UART0_S1: IDLE=1,OR=1,NF=1,FE=1,PF=1 */

  UART0_S1 |= UART0_S1_IDLE_MASK |

              UART0_S1_OR_MASK |

              UART0_S1_NF_MASK |

              UART0_S1_FE_MASK |

              UART0_S1_PF_MASK;      

  /* UART0_S2: LBKDIF=1,RXEDGIF=1,MSBF=0,RXINV=0,RWUID=0,BRK13=0,LBKDE=0,RAF=0 */

  UART0_S2 = (UART0_S2_LBKDIF_MASK | UART0_S2_RXEDGIF_MASK);                                  

      (void) UART0_D;                  /* Dummy read of the UART0_D register to clear flags */

  /* UART0_C5: TDMAE=0,??=0,RDMAE=0,??=0,??=0,??=0,BOTHEDGE=0,RESYNCDIS=0 */

  UART0_C5 = 0x00U;                                  

  /* UART0_C3: R8T9=0,R9T8=0,TXDIR=0,TXINV=0,ORIE=0,NEIE=0,FEIE=0,PEIE=0 */

  UART0_C3 = 0x00U;                                  

  /* UART0_C2: TIE=0,TCIE=0,RIE=0,ILIE=0,TE=1,RE=0,RWU=0,SBK=0 */

  UART0_C2 = UART0_C2_TE_MASK;

I've enabled the UART0 clock gate and the UART0_S1_TDRE and UART0_S1_TC flags seem to be doing their thing when I write to UART0_D... Just don't see any data out on pin A2... I've gone through the Processor Expert code and read the datasheet but alas I'm missing something.

Thank you for any help you can provide.

Kind Regards,

Joel

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1 解決策
779件の閲覧回数
chris_brown
NXP Employee
NXP Employee

Hi Joel,

Also, what clock is sourcing UART0 (rather than searching through the PEx code it might be easier to just run your setup in a debugger and get the SIM_SOPT2 register values when the part should be sending characters out of the UART)?

Thanks,

Chris

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8 返答(返信)
780件の閲覧回数
chris_brown
NXP Employee
NXP Employee

Hi Joel,

Also, what clock is sourcing UART0 (rather than searching through the PEx code it might be easier to just run your setup in a debugger and get the SIM_SOPT2 register values when the part should be sending characters out of the UART)?

Thanks,

Chris

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779件の閲覧回数
martynhunt
NXP Employee
NXP Employee

Joel,

I just ran this UART0 setup in a baremetal project and it works. As Chris suggested, check the SIM_SOPT2 register values with a debugger.

Thanks,

Martyn

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779件の閲覧回数
brintonengineer
Contributor III

Hi Martyn, Chris,

SIM_SOPT2_UART0SRC was it!!! I knew I was missing something! Thanks for your help!!!

Joel

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Monica
Senior Contributor III

Hello Joel,

did you get to try that out?

Please keep us posted! :smileywink:

Best regards,

Monica.

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779件の閲覧回数
brintonengineer
Contributor III

Hi Monica,

It's still an open issue with us. Haven't gotten it to work yet. We're still debugging, but any additional feedback is appreciated!

thanks,

Joel

779件の閲覧回数
martynhunt
NXP Employee
NXP Employee

Hi Joel,

Let me run this on a board here, and I'll see if I can get data.

Best regards,

Martyn

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779件の閲覧回数
martynhunt
NXP Employee
NXP Employee

Hi Joel,

Have you enabled the port clock for PORTA?

SIM_SCGC5 |= SIM_SCGC5_PORTA_MASK;

If so, how are you checking for data on A2?

Also, what baud rate are you trying to achieve?

Best regards,

Martyn

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779件の閲覧回数
brintonengineer
Contributor III

Hi Martyn,

Thanks for the reply. Yes we do have the port clock gate turned on:

SIM_SCGC5 |= (SIM_SCGC5_PORTD_MASK | SIM_SCGC5_PORTC_MASK | SIM_SCGC5_PORTB_MASK | SIM_SCGC5_PORTA_MASK); /* Enable clock gate for ports to enable pin routing */

We're trying to generate 25kbps. Yes, its an unusual baud rate but it's what our radio is expecting :smileyhappy:

We still haven't sloved this, its still an open issue with us :smileysad:

thanks,

joel

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