frdm-K64F clock setting

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frdm-K64F clock setting

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daveboyle
Contributor III

Hi, I have the clock on my frdm-K64F set to 120mhz thanks to Erich Styger's article. But in my PPG component (KDS 3.0) the timing period steps are all decimal equivalents of one third. Like .33333 or .6666 microseconds. Is it possible to set the clock to another value so that the PPG times and steps will be even multiples of a microsecond? Like .5 or 1.0 usec? How would I set that up?

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471 次查看
ZhangJennie
NXP TechSupport
NXP TechSupport

Hi,

the solution is to trim the Internal oscillator to 31.25KHz.

pastedImage_0.png

thus we can get a integer number MCG FLL output. so setting PPG period as 1us is also possible.

see my attached demo code.

can this help you?
Have a great day,
Zhang Jun

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472 次查看
ZhangJennie
NXP TechSupport
NXP TechSupport

Hi,

the solution is to trim the Internal oscillator to 31.25KHz.

pastedImage_0.png

thus we can get a integer number MCG FLL output. so setting PPG period as 1us is also possible.

see my attached demo code.

can this help you?
Have a great day,
Zhang Jun

-----------------------------------------------------------------------------------------------------------------------
Note: If this post answers your question, please click the Correct Answer button. Thank you!
-----------------------------------------------------------------------------------------------------------------------