tStart-up for MCF5223 EPHY

[xilinx]

Hi,

I have a question about the MCF5223. The manual reads:
"Whenever the EPHYEN bit transitions from 0 to 1, MDIO
communications must be delayed until the completion of a start-up delay period (tStart-up)"

But I cant find how long a "start-up delay period" for the EPHY actually is.

Br

[mjbcswitzerland]

Hi

The EPHY seems compatible with the EPHY in the MC9S12NE64. Also in the data sheet to the NE64 the tstart delay is mentioned with no actually value. The data sheet of the M5223X EPHY is a slightly modified version of of that description in the NE64 data sheet and the value is also missing.

However it is not that critical. Example code with the NE64 and M5223X use a simple loop with the following counts:
- NE64 running at 50MHz Loop count 64000
- M5223X running at 60MHz Loop count 200000

I used this delay in the NE64 and never had a problem. I have also recently started using the M5223X and using 2000000 as loop counter seems also perfectly reliable. I have never looked into exactly what delay this actually produces but the ratio 200000:64000 seems logical also due to the faster operation of the Coldfire. I suppose someone did once choose the loop counter based on real timing requirements....

I hope that freescale can tell us exactly what the delays should be, but don't let it stand in your way in the meantime; add the standard pause and your system will start just fine.

Regards

Mark Butcher
www.mjbc.ch

[DrSeuss]

This delay includes the power on timing (approx 720uS) and the timing for the ePHY to stabilize after the enable is set. On both the NE64 and m52235 the power on timing is most likely satisfied by the osc startup timing. The enable timing is most likely satisfied by "other" init code.

I removed this delay completely from the m52235 software without ill effect.

Was most likly added for some test drivers in asm, that really pounded the ePHY. Practical C software may not need this.

I will determine tSTARUP and have manual adjusted.