M5213EVB - having a hard time flash programming

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M5213EVB - having a hard time flash programming

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Felix
Contributor I
Running a RAM-based program under Code Warrior, I can't seem to get the CFM logic to work.

All the CFM registers (e.g. CFMPROT, SACC, DACC) are zeroed or have what seem like very friendly values, where appropriate.

The eval board has a system clock of 48mhz, so the CFMCLKD is 0xce (scaled by 8, divided by 15 (0xe + 1)).


First problem:

Example code and tortured reading of the "documentation" seems to indicate that one would, say, check whether the flash is erased or not by doing something like this:


        *((uint32 *) 0x1000)           = 0xFFFFffffLU;

        MCF_CFM_CFMCMD       = MCF_CFM_CFMCMD_RDARY1; // _RDARY1 is 0x5
        MCF_CFM_CFMUSTAT    = MCF_CFM_CFMUSTAT_CBEIF;

Then wait for the CBEIF and CCIF bits to come high and see whether the BLANK bit is high (at any time).

With a completely erased flash, the BLANK bit never comes high. In fact, using similar logic to erase the flash or to program a word in the flash seems to have no effect on the flash.


Second problem:

That assignment statement to the flash memory causes a bus error. An rte interrupt handler seems to stop the fuss, but you gotta wonder. :smileyhappy:


So, I'm kinda out of ideas, here. Can anyone help with this?

Thanks,

Alex

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mccPaul
Contributor I
When you write to the CFM flash, you need to use a backdoor address; See page 6-6 in the manual:
 

Flash accesses (reads/writes) by a bus master other than the core, (DMA controller), or writes to Flash by the core during programming must use the backdoor Flash address of IPSBAR plus an offset of 0x0400_0000. For example, for a DMA transfer from the first location of Flash when IPSBAR is still at its default location of 0x4000_0000, the source register would be loaded with 0x4400_0000. Backdoor access to Flash for reads can be made by the bus master, but it takes 2 cycles longer than a direct read of the Flash if using its FLASHBAR address.

Have you seen the example code I posted here:

http://forums.freescale.com/freescale/board/message?board.id=CFCOMM&message.id=2749#M2749

 

It should work fine on the 5213.

 

Paul.

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Felix
Contributor I
Whoa! Thanks. The odd-ball address did the trick.

Yes, your code verified my guess that to start the ball rolling, one must write something to a flash address.

AND, your code gave me pause and triggered yet more reading until I found the note about halving the system clock rate before calculating the clock divisor. The note was at the end of the EZport "documentation". In fact, that seemed to be the only place that the system clock was mentioned in the "documentation". Elsewhere, it speaks of an undefined "internal Flash bus clock".

AND, your code jibed with the EZport "documentation" clock divisor calculation, as opposed to (if I read it right, which would be trick in itself) the CFM "documentation"'s clock divisor calculation. The two calculations appear different for clocks evenly divided by 200k.

But, I have no idea what manual you've got with a section 6.6. I'm using MCF5213RM.pdf for "documentation". :smileyhappy:

Anyway, thanks much!

Felix

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mccPaul
Contributor I
Hi
 
I was looking at the 5216 manual - it was the first 521x manual I saw on the product page for the 5213!
 
The relevant bit in your manual is on page 15-5 (section 15.3.2).
 
I haven't used the EzPort, but looking at the documentation I can see why it is confusing.
 
The same equation is used in both cases (same for other devices with CFM):
 
DIV = Fsys / (2 x 200KHz x (1 + (PRDIV8 x 7 ) )
 
Fclk = Fsys / (2 x ( DIV + 1) x ( 1 + (PRDIV8 x 7) ) )
 
However, the CFM documentation in your manual doesn't give this equation clearly and also, it doesn't clearly tell you that FCLK is actually Fsys/2.
 
The equations shown in your manual for the EzPort are the same as the ones in the CFM section of my 5282 manual that I used to write the code.
 
Cheers,
 
Paul.
 
 
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