JTAG is nothing like BDM. JTAG is meant to be an "open standard". BDM is proprietary. So "the same doesn't apply".
Many NXP chips have pins labelled as "JTAG/BDM", but that means they can be used as one or the other, and not that those two are related in any way.
What do you mean by "FTDI"? That's the name of a company. They make 57 different chips, mainly USB-to-something (UART, SPI, parallel port etc). They're used in a lot of products, but it is the specific product that matters. I assume you're looking at the hardware listed here:
https://openocd.org/doc/pdf/openocd.pdf
OpenOCD doesn't support any Coldfire chips or BDM.
Larger (V2, V3) CPUs have BDM connectors with 26 pin connectors and 15 active signals. That's "too many pins" for the V1 chips, so they use TWO pins. They seemingly "multiplex" many of those 15 pins over one single pin using yet another and different protocol. The Manual says:
The traditional 3-pin full-duplex ColdFire BDM serial communication protocol based on 17-bit data packets is replaced with the HCS08 debug protocol where all communication is based on an 8-bit data packet using a single package pin (BKGD)
You didn't say which V1 CPUs you have, but I'm looking at the MCF51QM Manual, and I wouldn't like to have to implement the above protocol. You might find some better details if you read some HCS08 manuals. I'm saying you have to read both the CFV1 and HCS08 Manuals first to understand what you need to do to talk to these chips, and then you have to see if any chance of generating that protocol through a USB-connected parallel port. I doubt it as the timing on this single pin is critical, and looks like it needs dedicated special-purpose hardware (or a dedicated high speed microprocessor) to support.
These protocols are supported by the P&E Debug Pods. The pod for the V2 parts was last available in 2014, and went obsolete as the Coldfire chip that P&E were using went EOL. But the "Multilink Universal" now supports those chips, as well as the V1 ones. You then have to buy their programming software to use with it. P&E also supply Linux software, which might be closer to what you want. But you have to buy a license first, and that's US$699.
Then if you did get a pod working you'd have to write code to read and write the CPU registers so you can set up the CPU to run. Then you have to write "read and write memory" functions so you can get to the Flash and RAM. Then a Flash Programming module, maybe via the debug port. Or maybe you have to write a "Flash Programming Kernel" that you write, compile. load into the RAM inside the CPU and then communicate with that to program the Flash.
You'd be far better off throwing the CFV1 boards away and buying some ARM-based boards. Those you can program with Open Tools and OpenOCD.
Tom