Set a watchpoint to break on interrupts enabled/disabled

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Set a watchpoint to break on interrupts enabled/disabled

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roman_g
Contributor I

I need to stop debugging when global interrupts bit changes (HCS08).

 

How do I do that?

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CompilerGuru
NXP Employee
NXP Employee

Watchpoinits on registers are not supported for efficiency reasons, so that wont work :smileysad:.

 

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J2MEJediMaster
Specialist I

Set a watchpoint on the register.

 

---Tom

 

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CompilerGuru
NXP Employee
NXP Employee

Watchpoinits on registers are not supported for efficiency reasons, so that wont work :smileysad:.

 

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J2MEJediMaster
Specialist I

OK, so here's where I try to extract myself gracefully from giving a bogus answer. Poll the register's contents, placing a copy into memory. Set a watchpoint on that.

 

---Tom

 

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roman_g
Contributor I

How do I do that?

 

I need to detect interrupts being disabled, so I can't use interrupts for polling.

 

Do you suggest using BDC?

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bigmac
Specialist III

Hello,

 

I presume that the reason the I-bit becomes set is because you have commenced an interrupt process.  Otherwise, the flag would need to be explicitly set and cleared from within your code.

 

It might be possible to add some test code, as previously suggested, at the start of each ISR so that a break would occur when any ISR was entered.

 

What sort of problem are you trying to debug?  Do you have normal functions that are setting the flag, and then not re-enabling interrupts?  Perhaps you are attempting to implement nested interrupts?

 

Regards,

Mac

 

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roman_g
Contributor I
I got a load of spaghetti code, and I suspect somewhere in that code an interrupt gets enabled. Textual search came back empty, perhaps because there is more than one way to set I-bit (sei, tap, macros)
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bigmac
Specialist III

Hello,

 

I assume that your "spaghetti code" is actually written in assembly language.  Is this correct?  It is not entirely clear whether your problem is that interrupts become globally enabled when they should not, or whether interrupts are being globally disabled and not re-enabled.  (Setting the I-bit disables interrupts.)

 

A common cause for interrupts to become enabled when they should not might be due to interrupts being disabled within a sub-routine.  The software author then assumes that interrupts were previously enabled, so erroneously re-enables interrupts prior to exiting the sub-routine.  Be wary of the use of any CLI instructions within the code.  Apart from the enabling of interrupts during initialisation, I presume that there would be little need for use of the instruction.

 

If interupts need to be temporarily disabled within a sub-routine, the method I would normally use would be -

 

   TPA

   PSHA   ; Status register value to stack

   SEI    ; Disable interrupts

 

   ; Critical code here

 

   PULA

   TAP    ; Restore prior state

 

 I guess that you will need to write the special test code for de-bugging as a macro, and then selectively incorporate the macro within each sub-routine, just prior to exiting.

 

Regards,

Mac

 

 

 

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roman_g
Contributor I

On "Controlpoints Configuration" form, Watchpoints tab, there are few fields I need to specify to create a watchpoint:

1. "Address" - what do I specify as an address for status (SR or CCR) register? it is not mapped in memory.

2. "Condition" - I need something like "CCR & 0x08" to trigger the watchpoint on I (global interrupts mask) bit set.

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