QSCI baudrate setting

取消
显示结果 
显示  仅  | 搜索替代 
您的意思是: 

QSCI baudrate setting

621 次查看
Ujwala_kontham
Contributor I

Iam using Serial LDD component in Code worrier 11.1 and setting the baud rate of 115200 in the configuration but in actual generated code it is setting the baud rate as 57600 i.e., 1 index less in baud rate table, this is same for all baud rate, can I get a solution for this to set it as required.

 

 

0 项奖励
10 回复数

575 次查看
xiangjun_rong
NXP TechSupport
NXP TechSupport

Hi,

As you know that the SCI0 driving clock can be BUS_CLK or 2xBUS_CLK.
Pls check if you use BUS_CLK or 2xBUS_CLK by checking the SIM_PCR register.
This is from the RM of MC56F827xx.
 
xiangjun_rong_0-1709543325017.png

Hope it can help you

BR

XiangJun Rong

0 项奖励

573 次查看
Ujwala_kontham
Contributor I

yes in both the cases it is setting that same .

that means if we configure it for 115200 it setting baud rate of 57600

and if we configure it for 230400 it setting baud rate of 115200

0 项奖励

558 次查看
xiangjun_rong
NXP TechSupport
NXP TechSupport

Hi,

Okay, it appears that it is a bug of  Processor Expert, in the debug, pls read the QSCIx_RATE register, and tell us the BUS_CLK clock frequency you are using, then compute the baud rate of SCI based on the BUS_CLK or 2XBUS_CLK.

xiangjun_rong_0-1709606568473.png

If baud rate does not match with the expected, it is a bug of PE.

Hope it can help you

BR'

XiangJun Rong

0 项奖励

555 次查看
Ujwala_kontham
Contributor I

Iam using 30MHz of bus clock frequency and operating CPU in fast mode which intern sets core clock frequency and system clock frequency as 60MHz, and we debugged using both BUS_Clk and 2XBUS_Clck and got below values of QSCIx_RATE and QSCIx_CTRL3 registers respectively.
using BUS_CLk - 0104(RATE), 0000(CTRL3)
using 2XBUS_Clk - 0209(RATE), 0000(CTRL3)
and we also found that TimerInt_LDD component we are getting interrupt at double the time set in configuration that means if we configure it as 100us getting interrupt at 200us.

0 项奖励

550 次查看
xiangjun_rong
NXP TechSupport
NXP TechSupport

Hi,

If the BUS_CLK clock frequency is 30MHz, the baud rate will be:
case1:
using BUS_CLk - 0104(RATE),  baud rate=BUS_CLK/(16 *SBR)=30MHz(16*32.5)=57.7KHz instead of 115.2KHz
 
using 2XBUS_Clk - 0209(RATE),baud rate=2XBUS_CLK/(16 *SBR)=60MHz(16*65)=57.7KHz instead of 115.2KHz
 
Obviously, the code generated by PE has issue. Now and in the coming days, only SDK will be supported.
Sorry for the incorrect code.
BR
XiangJun Rong
0 项奖励

547 次查看
Ujwala_kontham
Contributor I

can i get SDK for my controller (MC56F82746)?

0 项奖励

533 次查看
xiangjun_rong
NXP TechSupport
NXP TechSupport

Hi,

As you know that MC56F82746 does not have tower board, so you have to select Processor as the following fig:

xiangjun_rong_0-1709692887828.png

Hope it can help you

BR

XiangJun Rong

0 项奖励

530 次查看
Ujwala_kontham
Contributor I

even after downloadind SDK of 2746 getting the project of 2748

 

 

0 项奖励

584 次查看
Ujwala_kontham
Contributor I

Iam using MC56F82746 VLF controller

0 项奖励

610 次查看
_Leo_
NXP TechSupport
NXP TechSupport

Hi,

Thank you so much for your interest in our products and for using our community.

Can you tell us which device are you using please?

0 项奖励