Hello FC,
I am not sure why you need to scale the ADC reading from 0 to 99. Since you are using an 8-bit result, why not simply divide this by 2 (shift right) to give 128 table entries for PWM value - a marginally larger table size. A divide by 4 would give 64 table entries.
I notice that you are handling the timer data as separate high and low bytes within the table. An alternative may be to have 16-bit entries in the pwm_table array variable.
A further comment - since you are using a substantial amount of inline assembly code within your ISR, I would tend to do the whole ISR using inline assembly, rather than mix.
Hello FC,
Since pwm_table is the array variable, and duty_cycle is the index to the array, I might have expected the following code. You seem to have reversed the two variables. The lslx instruction would be necessary because each array entry is two bytes, so the x value would need to be 0, 2, 4, etc. to select the correct entry. This is certainly the case with normal assembler. But perhaps it may differ for inline assembly?
Message Edited by bigmac on 2006-06-23 04:00 PM
Hello again FC,
I have just noticed a further issue with your code. You have used a divisor value of 255, rather than the expected value of 256 (potentially done by ignoring the low byte of the multiplication result). This will give a duty_cycle index decimal value of 0, 1, 2, ... 99, 100, a total of 101array entries. So the size of the array would need to be increased to allow for this.
For the PWM, the values of 0 and/or 100 will probably need to be treated as special cases, and may require more than just setting the timer value.
Regards,
Mac
volatile unsigned char duty_cycle; const unsigned char pwm_table[100][2] = { {0x00, 0x00}, . . {0xFF, 0xFF} }; __interrupt void isrVadc(void) { adc_reading = ADCRL; // clear COCO flag asm { lda adc_reading ldx #100 mul stx duty_cycle } TPMC0VH = pwm_table[duty_cycle][0]; TPMC0VL = pwm_table[duty_cycle][1]; }