56F807, CW8.3, LCF starts xRAM @ 0x0030 \ 0x0040, Why?

[j___]

I created two 56F807 projects using CW 8.3 stationary, one with Project Expert, one without.

The project made with PE, starts xRAM at 0x0040.

The project made without PE, start xRAM at 0x0030.

Why is the RAM not started at 0x0000?

Also, what are the compiler regs shown in the non-PE memory definitions?

Processor Expert LCF

MEMORY {
        # I/O registers area for on-chip peripherals
        .x_Peripherals (RW)   : ORIGIN = 0x1000, LENGTH = 0
        .x_CoreRegs    (RW)   : ORIGIN = 0xFF80, LENGTH = 0

        # List of all sections specified in the "Build options" tab
        #Internal vector boot area.
        .p_Interruptsboot  (RWX) : ORIGIN = 0x0000F800, LENGTH = 0x0004
        .p_Interrupts  (RWX) : ORIGIN = 0x00000000, LENGTH = 0x00000080
        .p_Code  (RWX) : ORIGIN = 0x00000080, LENGTH = 0x0000EF80
        .x_Data  (RW) : ORIGIN = 0x00000040, LENGTH = 0x00000FC0  #<<<---- Starts at 0x40
        .x_CWRegisters  (RW) : ORIGIN = 0x00000030, LENGTH = 0x00000010

        #Other memory segments
        .x_internal_ROM  (RW)  : ORIGIN = 0x00002000, LENGTH = 0x2000
        .p_internal_RAM  (RWX) : ORIGIN = 0x0000F000, LENGTH = 0x0800
}

Non-PE LCF

MEMORY
{
    .p_boot_flash_1       (RX)  : ORIGIN = 0x0000, LENGTH = 0x0004
    .p_interrupts_ROM     (RX)  : ORIGIN = 0x0004, LENGTH = 0x007C
#   .p_flash_ROM_A        (RX)  : ORIGIN = 0x0080, LENGTH = 0x7F80
#   .p_flash_ROM_B        (RX)  : ORIGIN = 0x8000, LENGTH = 0x7000
    .p_flash_ROM          (RX)  : ORIGIN = 0x0080, LENGTH = 0xEF80
    .p_internal_RAM       (RWX) : ORIGIN = 0xF000, LENGTH = 0x0800
    .p_boot_flash_2       (RX)  : ORIGIN = 0xF800, LENGTH = 0x0000
    .x_compiler_regs_iRAM (RW)  : ORIGIN = 0x0030, LENGTH = 0x0010  <<<---- Starts at 0x30  
    .x_internal_RAM       (RW)  : ORIGIN = 0x0040, LENGTH = 0x0FC0
    .x_peripherals        (RW)  : ORIGIN = 0x1000, LENGTH = 0x0800
#   .x_reserved                 : ORIGIN = 0x1800, LENGTH = 0x0800
    .x_flash_ROM          (R)   : ORIGIN = 0x2000, LENGTH = 0x2000
    .x_external_RAM       (RW)  : ORIGIN = 0x4000, LENGTH = 0xBF80
    .x_core_regs          (RW)  : ORIGIN = 0xFF80, LENGTH = 0x0000
}

[xiangjun_rong]

Hi, Jim,

Regarding your question about the X:0x0000 to X:0x002F, I am sure that the space from X:0x0000 to X:0x002F are internal RAM space, and is available and can be used by customer in Mode 0A.

But the CW compiler supports register variable, it uses the   .x_compiler_regs_iRAM (RW)  : ORIGIN = 0x0030, LENGTH = 0x0010 as register variables. Pls refer to the following figure from Targeting_56800cd.pdf located at:.......\Freescale\CodeWarrior for DSC56800E v8.3\Help\PDF

Because the space X:0x0030 to 0x003F are used for special utilization, the space from x:0x0000 to 0x2F is too small to be used, so we start from X:0x0040.

Hope  it can help you

BR

Xiangjun Rong