> - close SPI
Closed in main before loop.
SPI2C1_SPE = 0;
> - close IIC
Closed in main before loop.
IIC1C1_IICEN = 0;
> - close ADC
/* ### Init_ADC init code */
/* ADCCFG: ADLPC=1,ADIV1=0,ADIV0=0,ADLSMP=0,MODE1=0,MODE0=0,ADICLK1=0,ADICLK0=1 */
ADCCFG = 0x81;
/* ADCSC2: ADACT=0,ADTRG=0,ACFE=0,ACFGT=0 */
ADCSC2 = 0x00;
/* ADCCV: ADCV11=0,ADCV10=0,ADCV9=0,ADCV8=0,ADCV7=0,ADCV6=0,ADCV5=0,ADCV4=0,ADCV3=0,ADCV2=0,ADCV1=0,ADCV0=0 */
ADCCV = 0x00;
/* ADCSC1: COCO=0,AIEN=0,ADCO=0,ADCH4=1,ADCH3=1,ADCH2=1,ADCH1=1,ADCH0=1 */
ADCSC1 = 0x1F;
> - close internal bandgap ref
Should be closed by bit 0 (BGBE) in SPMSC1.
/* ### MC9S08QE128_80 "Cpu" init code ... */
/* PE initialization code after reset */
/* Common initialization of the write once registers */
/* SOPT1: COPE=0,COPT=1,STOPE=1,RSTOPE=0,BKGDPE=0,RSTPE=0 */
SOPT1 = 0x60;
/* SOPT2: COPCLKS=0,SPI1PS=0,ACIC2=0,IIC1PS=0,ACIC1=0 */
SOPT2 = 0x00;
/* SPMSC1: LVDF=0,LVDACK=0,LVDIE=0,LVDRE=1,LVDSE=0,LVDE=1,BGBE=0 */
SPMSC1 = 0x14;
/* SPMSC2: LPR=0,LPRS=0,LPWUI=0,PPDF=0,PPDACK=0,PPDE=0,PPDC=0 */
SPMSC2 = 0x00;
/* SPMSC3: LVDV=0,LVWV=0,LVWIE=0 */
SPMSC3 &= (unsigned char)~0x38;
/* System clock initialization */
/* ICSC1: CLKS=1,RDIV=0,IREFS=1,IRCLKEN=0,IREFSTEN=0 */
ICSC1 = 0x44; /* Initialization of the ICS control register 1 */
/* ICSC2: BDIV=3,RANGE=0,HGO=0,LP=1,EREFS=1,ERCLKEN=0,EREFSTEN=0 */
ICSC2 = 0xCC; /* Initialization of the ICS control register 2 */
> - close rti
Do you mean the RTIE (Real-Time Interrupt Enable) in RTC?
It doesnt lower the current usage when RTC disabled.
/* ### Init_RTC init code */
/* RTCMOD: RTCMOD=4 */
RTCMOD = 0x04;
/* RTCSC: RTIF=1,RTCLKS=0,RTIE=1,RTCPS=0x0F */
RTCSC = 0x9F;
> - close clock monitor
Do you mean the clock gating?
I only enable RTC and IRQ beans.
/* SCGC2: DBG=0,FLS=0,IRQ=1,KBI=0,ACMP=0,RTC=1,SPI2=0,SPI1=0 */
SCGC2 = 0x24;
/* SCGC1: TPM3=0,TPM2=0,TPM1=0,ADC=0,IIC2=0,IIC1=0,SCI2=0,SCI1=0 */
SCGC1 = 0x00;
> - close watchdog and internal 1Khz
The watchdog (COP) is disabled by bit 7 (COPE) in SOPT1. But the low power 1kHz is used by the RTC, and when it can run in STOP2 with a current usage of 0.4uA so its not that.
/* ### Init_COP init code */
SRS = 0xFF; /* Clear WatchDog counter */
/* SOPT1: COPE=0,COPT=1,STOPE=1,RSTOPE=0,BKGDPE=0,RSTPE=0 */
SOPT1 = 0x60;
/* SOPT2: COPCLKS=0,SPI1PS=0,ACIC2=0,IIC1PS=0,ACIC1=0 */
SOPT2 = 0x00;
> - close timer1 and 2
I think it got 3 timers (TPM1. TPM2, TPM3).
/* ### Init_TPM init code */
/* TPM3SC: TOF=0,TOIE=0,CPWMS=0,CLKSB=0,CLKSA=0,PS2=0,PS1=0,PS0=0 */
TPM3SC = 0x00; /* Stop and reset counter */
TPM3MOD = 0x00; /* Period value setting */
(void)(TPM3SC == 0); /* Overflow int. flag clearing (first part) */
/* TPM3SC: TOF=0,TOIE=0,CPWMS=0,CLKSB=0,CLKSA=0,PS2=0,PS1=0,PS0=0 */
TPM3SC = 0x00; /* Int. flag clearing (2nd part) and timer control register setting */
/* ### Init_TPM init code */
/* TPM1SC: TOF=0,TOIE=0,CPWMS=0,CLKSB=0,CLKSA=0,PS2=0,PS1=0,PS0=0 */
TPM1SC = 0x00; /* Stop and reset counter */
TPM1MOD = 0x00; /* Period value setting */
(void)(TPM1SC == 0); /* Overflow int. flag clearing (first part) */
/* TPM1SC: TOF=0,TOIE=0,CPWMS=0,CLKSB=0,CLKSA=0,PS2=0,PS1=0,PS0=0 */
TPM1SC = 0x00; /* Int. flag clearing (2nd part) and timer control register setting */
/* ### Init_TPM init code */
/* TPM2SC: TOF=0,TOIE=0,CPWMS=0,CLKSB=0,CLKSA=0,PS2=0,PS1=0,PS0=0 */
TPM2SC = 0x00; /* Stop and reset counter */
TPM2MOD = 0x00; /* Period value setting */
(void)(TPM2SC == 0); /* Overflow int. flag clearing (first part) */
/* TPM2SC: TOF=0,TOIE=0,CPWMS=0,CLKSB=0,CLKSA=0,PS2=0,PS1=0,PS0=0 */
TPM2SC = 0x00; /* Int. flag clearing (2nd part) and timer control register setting */
The diagram... Its a demoboard from freescale called: DEMOQE with a MC9S08QE128 daughter card. All jumpers have been removed (not vcc)
As far as I can see, I have done all on your list. But thanks for the input.
Best regards,
Bruno
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Message Edited by BrunoTh111 on 2007-12-10 04:20 PM
