SPI Transmission Gaps between each byte sent

取消
显示结果 
显示  仅  | 搜索替代 
您的意思是: 

SPI Transmission Gaps between each byte sent

1,847 次查看
Coderunner
Contributor III

Hello everyone,

 

I am fairly new to C programming and right now trying to utilize the SPI interface to control EEPROM (FM25640) with MC9S08JM60. The issue that I am having is that there are gaps between each byte sent by the SPI. My guess is that he gaps are created by checking the SPTEF flag (transmit buffer empty flag) before sending next byte. Is this normal?? Shouldn't the the data and clock be seamless?

 

I have SPI interrupts disabled, 8 bit mode, SPI mode 0, SPI frequency is set to 2MHz, data sent MSB first.

 

I attached the logic analyzer picture of the signals.

 

Also here is a sample code from my application, this is a memory WRITE function:

 

void RAM_WRITE(word adrs, byte data){  byte ADH=0,ADL=0;  //split 16-bit address into two 8-bit parts    ADH=adrs >> 8;  ADL=(adrs & 0x00FF);  CS=0;                         //enable FM25640; pull chip select low  while(SPI1S_SPTEF!=1);        //wait until transmit buffer is empty    SPI1DL=WRITE;                 //send the WRITE TO MEMORY command  while(SPI1S_SPTEF!=1);        //wait until transmit buffer is empty   SPI1DL=ADH;  while(SPI1S_SPTEF!=1);        //wait until transmit buffer is empty   SPI1DL=ADL;  while(SPI1S_SPTEF!=1);        //wait until transmit buffer is empty     SPI1DL=data;  dly(7);  CS=1;                         //disable FM25640; pull chip select high }
标签 (1)
0 项奖励
回复
3 回复数

1,031 次查看
kef
Specialist I

Coderunner,

 

Are gaps really an issue? Do you have interrupts enabled? If you do, then some interrupt may happen after you send one byte, but before you buffer next byte. If this interrupt takes more than byte transfer time (4us in your case), you may see even larger gaps.

 

I don't see where is it specified in S08 datasheets or reference manuals, but in S12(X) datasheets it is said that back to back transfers without gaps are available in CPHA=1 format, while CPHA=0 requires extra 1/2 SPI clock period between bytes. I guess this is the case in S08 too. Of course CPHA and CPOL settings must match your slave device requirements and CPHA=1 may be incompatible with your slave.

 

0 项奖励
回复

1,031 次查看
bigmac
Specialist III

Hello,

 

I have attached some code that is suitable for a different SPI EEPROM device, that will probably easily adapt to the device you are using.  The file SPI.c shows the correct way of using the SPI module as a master.  However, the SPI initialisation will need to ensure that 8-bit mode is selected (the code was initially written with the 9S09QG8 device in mind).  You will probably also need to alter the macros for CS_ON and CS_OFF, to suit your pin connections.

 

Regards,

Mac

 

0 项奖励
回复

1,031 次查看
Coderunner
Contributor III

Thank you for the sample project. I learned some program structuring from that. As far as the gaps in the spi data stream, when I got other nicks out of the program the gaps didn't cause any problems!

0 项奖励
回复