Thank you for the remark. Then we get even simpler code. Now I see 2MHz on the scope. Is it possible that to jump from overflow to 0 timer needs additional 7 clock cycles? Were are 8 MHz?
#include <hidef.h> /* for EnableInterrupts macro */
#include "derivative.h" /* include peripheral declarations */
void InitializeTX(void) {
TPMSC_TOIE = 0; //Timer TPM1CH0 disable 0
PTADD_PTADD0 = 1;
TPMSC_CLKSB = 0;
TPMSC_CLKSA = 1; // 01 bus clock
TPMSC_PS2 = 0;
TPMSC_PS1 = 0;
TPMSC_PS0 = 0; // clock not devided
TPMMODH = 0;
TPMMODL = 1;
TPMC0SC_CH0IE = 0; // 0 - channel interrupt disable
TPMC0SC_MS0B = 0;
TPMC0SC_MS0A = 1;
TPMC0SC_ELS0B = 0; // now working in output compare toggle mode
TPMC0SC_ELS0A = 1;
}
void main(void)
{
SOPT1_COPE = 0; // 0 - disable watchdog, 1 - default after reset
EnableInterrupts;
InitializeTX();
for(;
![Smiley Wink :smileywink:](http://freescale.i.lithium.com/i/smilies/16x16_smiley-wink.gif)
{
} /* loop forever */
}