Hello Dave,
First thanks for giving the SR# away, that will prevent double work from FSL Tech Supp guys/girls.
For me, noise on a clean signal must come from misalignment.
Each BIT is sampled THREE times. If these THREE samples are not identical, there is noise.
If the BIT is not properly aligned, one of the sample may take the level of the previous or the following BIT within the BYTE.
The clock of the SCI is 16 times the clock of the baudrate and re-synchro to every high to low edge.
Therefore, on a slightly shifted baudrate, noise could be flagged.
'P' is 0x50 you indicate. A SCI message is 10-bits with last one at high level.
Therefore your graph should show 9 bits between the falling edge (Start bit) and the last rising edge (last 0 of lower nibble).
9600 bps means 104.17us per bit.
For 9 bits duration = 937.5us but your graph shows 900us < duration < 950us but I cannot see more precisely.
Can you please check the actual baudrate of the MCU?
For this send 0x55 from the MCU SCI and check bit timing over several bits to observe the shift.
Cheers,
Alban.