ENBDM set
ERCLKEN and EREFSTEN set
LVDSE and LVDE set
Any help would be appreciated. Thanks.
-Robert
volatile unsigned char PGM[6] = { 0xf7, // sta ,X FSTAT 0x44, // lsra - delay and convert to FCCF bit0xf5, // Bit X ,fstat0x27,0xfd, // BEQ *-10x81 // RTS}; byte FlashErasePage(word page) { asm { TPA ; Get status to A PSHA ; Save current status SEI ; Disable interrupts LDA #0x30 STA FSTAT ; Clear FACCERR & FPVIOL flags LDHX page STA ,X ; Save the data LDA #$40 ; Erase command STA FCMD LDA #FSTAT_FCBEF_MASK LDHX @FSTAT JSR PGM PULA ; Restore previous status TAP } if (FSTAT&0x30){ //check to see if FACCERR or FVIOL are set return 0xFF; //if so, error. } return 0; }byte FlashProgramByte(word address, byte data) { asm{ TPA PSHA ; Save current status SEI ; Disable interrupts LDA #0x30 STA FSTAT ; Clear FACCERR & FPVIOL flags LDHX address LDA data STA ,X ; Save the data LDA #$20 ; Burn command STA FCMD LDA #FSTAT_FCBEF_MASK LDHX @FSTAT JSR PGM PULA ; Restore previous status TAP } if (FSTAT&0x30){ //check to see if FACCERR or FVIOL are set return 0xFF; //if so, error. } return 0; }
byte FlashErasePage(word page) {volatile unsigned char PGM[9] = { 0x45,0x18,0x25, // LDHX @FSTAT 0xf7,0x44, // lsra - delay and convert to FCCF bit0xf5, // Bit fstat0x27,0xfd, // BEQ *-30x81 // RTS}; asm{ TPA PSHA ; Save current status SEI ; Disable interrupts LDA #0x30 STA FSTAT ; Clear FACCERR & FPVIOL flags LDHX page STA ,X ; Save the data LDA #$40 ; Erase command STA FCMD LDA #$80 LDHX @PGM JSR ,X PULA ; Restore previous status TAP } return (FSTAT & 0x30); }byte FlashProgramByte(word address, byte data) {volatile unsigned char PGM[9] = { 0x45,0x18,0x25, // LDHX @FSTAT 0xf7,0x44, // lsra - delay and convert to FCCF bit0xf5, // Bit fstat0x27,0xfd, // BEQ *-30x81 // RTS}; asm{ TPA PSHA ; Save current status SEI ; Disable interrupts LDA #0x30 STA FSTAT ; Clear FACCERR & FPVIOL flags LDHX address LDA data STA ,X ; Save the data LDA #$20 ; Burn command STA FCMD LDA #$80 LDHX @PGM JSR ,X PULA ; Restore previous status TAP } return (FSTAT & 0x30); }
I am running the 9S08JM60 on 3.3V, so we can’t use the internal USB regulator. We plan on connecting pin 25, the USB 3.3V supply to VDD. When the part enters STOP 2 or STOP 3, will the USB be completely powered down? I.E., will the part be in the very low power mode, < 1uA?
Thanks,
-
Robert