KBI interrupt problem on AW60

キャンセル
次の結果を表示 
表示  限定  | 次の代わりに検索 
もしかして: 

KBI interrupt problem on AW60

1,529件の閲覧回数
mazz_76
Contributor I
Hello everyone,
I am experiencing a problem with the KBI interrupt on an AW60 microcontroller.
The interrupt is enabled on the falling edge of KBIP0 (PTG0) by an init routine.
On the occurrance of the interrupt a pin toggle is executed.
 
Here are the routines:
 
void KBIInit(void)
{
    KBI1PE = 0b00000001;    /* interrupt on KBI0 */           
    KBI1SC = 0b00000100;    /* KBEDGE7..4 --> 0 (don't care) */
                                              /* KBF --> 0 (read only) */
                                              /* KBACK --> 1 (reset KBF) */
                                              /* KBIE --> 0 (interrupt disabled) */
                                              /* KBIMOD --> 0 (only edge detection) */
   
    KBI1SC = 0b00000110;   /* KBI interrupt enable */
    return;
}
 
#pragma TRAP_PROC
void KbiIntHandler (void)
{   
    if (KBI1SC_KBF)
    {
       OUPUT = !OUPUT;            //pin toggle
        KBI1SC_KBACK = 1;        /* ACK to reset interrupt flag */
    }
    return;
}
 
The input signal on the KBI pin is a square ware with frequency approx 50Hz.
I would expect to see a 50 Hz pin toggle on the output pin.
What happenes is that some times (quite often) as soon as the interrupt procedure is exited it is entered again so I see a pin toggle 10 usec after the previous one.
 
Thank you,
John
ラベル(1)
0 件の賞賛
返信
2 返答(返信)

418件の閲覧回数
Denn
Contributor I
Hello John,
 


mazz_76 wrote:
.
The interrupt is enabled on the falling edge of KBIP0 (PTG0) by an init routine.
On the occurrance of the interrupt a pin toggle is executed.
 
The input signal on the KBI pin is a square ware with frequency approx 50Hz.
I would expect to see a 50 Hz pin toggle on the output pin.
What happenes is that some times (quite often) as soon as the interrupt procedure is exited it is entered again so I see a pin toggle 10 usec after the previous one.

I feel the toggling signal should have period twice the period of input signal because you are  toggling at falling edge of 50 Hz signal 
"The interrupt is enabled on the falling edge of KBIP0 (PTG0) by an init routine.
On the occurrance of the interrupt a pin toggle is executed. "
 
 
And hence toggling pulse width (high/low)should be  0.02 seconds.But this doesn't explain about 10 us toggle pulse width
 
 
Regards,
Denn


Message Edited by Denn*** on 2008-04-01 12:58 PM
0 件の賞賛
返信

418件の閲覧回数
mazz_76
Contributor I
Perfectly right...sorry output period double...
As you say this is not the problem..
Thank you...
 
0 件の賞賛
返信