Hello,
The data sheet for the HC908QB8 actually provides the detailed calculations for baud rate tolerance (during receive) for its ESCI module. For the SCI module within the 9S08QG8, I would expect the allowable tolerance to be similar, assuming a similar method of start bit detection for both devices.
The required tolerance on receive baud rate is somewhat tighter than the 5% currently assumed -
Incoming data slow : 4.5% for 8-bit data, 4.1% for 9-bit data.
Incoming data fast : 3.9% for 8-bit data, 3.5% for 9-bit data.
For the send baud rate, the allowable tolerance will depend on the operation of the UART within the remote device (PC etc.), and might differ slightly from the above figures.
For the 9S08QG8 device, the specified minimum period trim adjustment for the internal oscillator seems a little ambiguous with a typical value of 0.1%, but a maximum value of 0.2% (per step?). This is the only means of fine adjustment of baud rate for the 'QG8.
For the HC908QB8, the internal oscillator adjustment is nominally 0.2 percent per step, but has an additional means of fine adjusment within the baud rate pre-scaler (one of the reasons it is called an ESCI).
The internal oscillator adjustment for the 'QG8 may need to take into account two factors -
- The initial frequency tolerance of the internal oscillator (unit to unit variation), and
- Fine adjustment requirements to compensate for baud rate errors associated with the baud rate divisor setting.
It is likely that the calibration process during BDM programming will take into account the first factor, but not the second. However, since the second factor will be a fixed correction for a given baud rate, it should be possible to take the trim value determined during programming, and then add the additional correction.
Mike,
I am a little unclear on possible A2D problems - perhaps you might like to elaborate.
Regards,
Mac
Message Edited by bigmac on
2007-05-29 04:13 AM