Hello Stefano,
What you seem to be saying is that when the two SCI modules are setup identically, one SCI module produces a break timing error of one half bit period, whereas the other one produces the correct timing. Have you checked for any Mask Set Errata documents?
If you happen to have discovered an (at least publicly) undocumented bug, perhaps your only recourse may be to hold the SBK bit active for greater than one break period so that the duration of the break signal is extended by an additional period.
Regards,
Mac