Bit-banding on iMX6sx M4 core

[maurosalvini]

Hi,

Cortex-M4 cores features bit-banding to map a complete word of memory onto a single bit.

I haven't found anything about it on iMX6sx reference manual, so is this feature present on the m4 core of this chip?

Thanks in advance, regards

Mauro

[maurosalvini]

Hi Carlos,

thank you for your answer.

I read the Cortex-M4 technical reference manual, that reports this system address map:

but I cannot find a correspondence between this address map and the iMX6SX one.

Here the peripheral part of M4 address map:

Address area 0x40000000-0x40100000 of peripheral bit band region is in the 11MB area marked as "reserved" in iMX6SX map table, but the peripheral bit band alias region 0x42000000-0x44000000 reported in ARM documentation overlaps with AIPS1, 2, and 3 mappings (that contains registers of connected peripherals), so I deduce that the peripheral alias region for bit-banding is not at 0x42000000 offset in iMX6SX M4 core (but I could be wrong in that).

Am I misunderstanding something? If not, could you tell me what is the start address of this address area?

I also read the iMX7D reference manual, but it confused me even more.

Thanks in advance, kind regards

Mauro

[CarlosCasillas · Accepted solution]

Hi Mauro,

Carlos_Musich is out of office, but I double checked with R&D, and they mentioned that according to the ARM Cortex-M4 Technical Reference Manual, bit-bandiing is an optional feature. (First sentence of section 3.7), and, it was not implement on any of the i.MX processors with included M4 core due to the  large amount of memory map space that it requires.

Hope this will be useful for you.

Best regards!

/Carlos

[maurosalvini]

Hi Carlos,

thanks for your answer.

Yes, I read that bit banding is an optional feature, and I suspected that is not implemented in M4 cores of heterogeneous iMX6 chips, hence I wrote the starting question.

Thanks again, kind regards

Mauro

[Carlos_Musich]

Hi Mauro,

from NXP side I have confirmed with R&D team that bit-banding has been implemented in M4 cores of i.MX6X and i.MX7D, however this is a feature of the ARM cortex rather than the whole NXP processor, so you may look at the ARM documentation for any reference.

Regards,

Carlos