MKL03 wakes immediately from VLLS3,no wake up source is enabled

[diegocolombo]

Hello kind people. 

i'm developing a very simple application using the MKL03, similar to others that i developed with MKL05,without any of this problems.

The problem is about VLLS3 mode.To make it very simple end evident i reduced the job that the micro has to do to an almost useless task:

After POR and initialization i blink a LED for 2 secs,then i go to sleep in VLLS3,i wanto to stay in that state indefinitely.If the uC would wake from VLLS3 mode, it would be from reset ,so to repeat the LED blink,but this has not to happen,having all the wake up sources disabled.

What happens is,instead, that  the uC wakes up immediately after

SMC_PMCTRL |= SMC_PMCTRL_STOPM(0x3);
 dummyread = SMC_PMCTRL;
 __asm("WFI");‍‍‍‍‍‍‍‍‍

I can verify that it was a reset from VLLS3 with this simple check,after PE_low_level_init()

wake_reason=1;
if (((SMC_PMCTRL & SMC_PMCTRL_STOPM_MASK)== VLLS) && 
((SMC_STOPCTRL & SMC_STOPCTRL_VLLSM_MASK)== VLLS_3))
 {
  wake_reason=2;
  if(LLWU_F1)wake_reason +=1;
  if(LLWU_F3)wake_reason+=2;
  if(LLWU_ME)wake_reason+=5;
  if(LLWU_FILT1)wake_reason+=8;‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍
//notice that the definition file contains LLWU_FILT2,but it looks not existing,
//despite the reference manual,trying to read it leads to an Hard fault
 }
...
...‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍
Pulses_PTA3(wake_reason);‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍

then i generate n° wake_reason pulses that i can freeze on the oscilloscope,so to recognize at least in wich register the wake event was marked

I always read 2 pulses,wake_reason==2,indicating that it was actually a wake up from VLLS3 mode,but none of the LLWU registers contains a bit=1.

In the reference manual i read that the other possible sources are NMI pin and RESET pin

I disabled the NMI in startup_MKL03Z4.S,see last row(NMI disable K02F with KDS thanks Jorge Gonzales), because that and lot of the usual settings are not available in the CPU component for this processor.

/* Flash Configuration */
 .section .FlashConfig, "a"
 .long 0xFFFFFFFF
 .long 0xFFFFFFFF
 .long 0xFFFFFFFF
 .long 0xFFFF3BFE‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍

The reset pin is constantly at high level.

I verified that the Allow Very-Low-Leakage Stop Mode AVLLS was correctly set.

Despite this precaution the uC is not able to stay in VLLS3,why?

Thanks in advance.

Diego

Milan,Italy

[diegocolombo]

Solved,

thanks to How can I know what is setting the STOPA bit on SMC_PMCTRL? 

Even in my case the problems whas caused by

http://www.nxp.com/assets/documents/data/en/errata/KL03Z_1N86K.pdf

e8068: RTC: Fail to enter low power mode if RTC time invalid flag (TIF) is not cleared

after POR

Errata type: Errata

Description: After POR, time invalid flag of RTC is set, RTC_SR[TIF]=1. If this flag is not cleared, the MCU

fails to enter low power mode.

Workaround: Clear time invalid flag of RTC before entering low power mode. This bit is cleared by writing the

RTC_TSR register when the time counter is disabled.

My fault was that i looked in the errata searching specific strings as "VLLS" and i have considered "low power mode" something not properly ineherent to very low leakage stop modes.

PS this row was senseless becaus this register does not contain infos about wake up reason,it just enables the wake up.Sorry.

if(LLWU_ME)wake_reason+=5;