QSPI Driver Bug?

cancel
Showing results for 
Show  only  | Search instead for 
Did you mean: 

QSPI Driver Bug?

Jump to solution
627 Views
eGuy
Contributor IV

I am uing MQX 3.7

 

In spi_pol_mcf5xxx_qspi.c function _mcf5xxx_qspi_polled_tx_rx:

 

    /* Setup queue */
    tmp = qspi_ptr->QWR & (~ (MCF5XXX_QSPI_QWR_NEWQP(0xF) | MCF5XXX_QSPI_QWR_ENDQP(0xF)));
    qspi_ptr->QWR = tmp | MCF5XXX_QSPI_QWR_NEWQP(0) | MCF5XXX_QSPI_QWR_ENDQP(data - 1);

here tmp is defined as uint_8.  but QWR is 16 bit register, this will slice off the upper 8 bit. the effect is causing chip-select pins goes low in a very short time (20ns)

 Change: define tmp as uinit_16.

 

Similar problem in spi_int_mcf5xxx_qspi.c _mcf5xxx_qspi_int_isr function:

define reg_tmp as uint_16 instead of uint_8

 

Regards,

 

Jeff

0 Kudos
1 Solution
444 Views
PetrM
Senior Contributor I

Thanks for reporting this. The fix will be available in the next release.

 

Regards,

PetrM

 

View solution in original post

0 Kudos
1 Reply
445 Views
PetrM
Senior Contributor I

Thanks for reporting this. The fix will be available in the next release.

 

Regards,

PetrM

 

0 Kudos