Here, I am not able to upload interface for Debug image.
Message comes "You are not allowed to create or update this content"
BTW,
FSEC value : 0xFE
Debug interface through SWD :
Pins of micro controllers interface as below;
pin 56 : Reset having external RC delay (10 kohm & 10nF ceramic chip capacitor)
pin 65 : Debug IO
pin 66 : Debug Clock
Vdd & Ground
I am using J link debugger from Segger.
With above interface I am able to program and debug other micro controllers which are functionally ok (not locked/damaged) and thereby I believe interface is ok, any feedback please.
My problem is getting severe and development stuck up.
Another points I want to clarify that, in my design TAMPER0, TAMPER1 & TAMPER2 are grounded and I have made ND logic disabled in bootloader. Also in my design there is no RTC battery and RTC is disabled in application. Any feedback please?
Regards
Kalpesh